I'm developing MediaLB driver on IMX6Q SABRE for
Automotive Infotainment. And I'm confused with the datasheet. In
the Chapter 43, We talked about how to initialize the registers
and how to handle the interrupts, But I did not see how we handle
the data. We have ring buffer in the chip as Table 43-9
Synchronous CDT Entry Format on Page 3765 in
IMX6DQRM.pdf. I do not know how RPTR and WPTR grow. Even
I cann't find the node size of ring buffer. So I cann't handle the
data in buffer correctly.
On Page 3807, 43.6.28 AHB Control Register
(MLB150_ACTL), There is a bit named DMA_MODE. It was
0 DMA Mode 0,
1 DMA Mode 1
.How mode 0 and mode 1 works?
The third question is whether both rx and tx channel have ring
buffer.Whether each channel have a ping buffer and a pong buffer.
What's the relationship between ping pong buffer described in
ADT and ring buffer described in CDT.