I recently put this question to Freescale support but they were unable to answer it. It's a long shot at best, but here's the question . .
We have a design in which the K20 must access, via FlexBus, a remote DRAM which is connected to an FPGA. Since the DRAM is shared with several video streams, and since therefore access times can vary considerably, we are obliged to use the FB_TA input to control bus transactions. But we also need the byte enable signals so that the DRAM can be used by software in a normal manner. The problem is that FB_TA and FB_BE_7_0 share the same package pin.
As we see it, there are 2 options for us:
1. Connect FB_TA and access the DRAM as 32-bit words only; or
2. Hook up the byte enables and use auto-acknowledge set up for the worst possible access time case (assuming it is within the auto-acknowledge range).
Neither option is satisfactory from our point of view.
Can you [i.e. anyone] suggest any other way in which we might achieve full byte-enabled FlexBus access with bus cycle termination controlled by the external device?