EIM_DCR resister in i.MX6SDL.

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EIM_DCR resister in i.MX6SDL.

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keitanagashima
Senior Contributor I

Dear Sir or Madam,

Hello.

Refer to 22.9.8 DLL Control Register (EIM_DCR) in MCIMX6SDLRM(Rev.1).

In case of Continuous BCLK mode, does anyone have the setting example of EIM_DCR resister?

I didn't understand way of setting this resister.

Keita

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Yuri
NXP Employee
NXP Employee

  As stated in section 22.5.1 (Continuous BCLK) of the i.MX6 SDL RM :

To let EIM work properly under continuous BCLK MODE, the initialization must follow

Procedure, described in the section :

“The recommended initialize flow is as follow

1. Disable EIM clock by clearing bit 4 of EIM_WIAR Register.

2. Select Continuous BCLK by setting bit 3 of EIM_WCR Register.

3. Enable DLL by setting bit 0 of EIM_DCR Register.

4. Enable EIM clock by setting bit 4 of EIM_WIAR Register.

5. Reset DLL by toggling bit 1 of EIM_DCR Register(1->0->1).

6. Wait for DLL lock (Both bit 0 and bit 1 of EIM_DSR Register are asserted).”

As we can see there is no need for setting specific (non-default) values for
bit fields of the EIM_DCR. It will achieve DLL locking automatically.

  The special internal DLL implements a master-slave structure, where a master measures the

cycle time, but  a slave is updated by the values, measured by the master at intervals, configured
in the EIM_DCR.   Also, it possible manual (slave) adjustment, provided via override OVERRIDE bit fields.

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Yuri
NXP Employee
NXP Employee

  As stated in section 22.5.1 (Continuous BCLK) of the i.MX6 SDL RM :

To let EIM work properly under continuous BCLK MODE, the initialization must follow

Procedure, described in the section :

“The recommended initialize flow is as follow

1. Disable EIM clock by clearing bit 4 of EIM_WIAR Register.

2. Select Continuous BCLK by setting bit 3 of EIM_WCR Register.

3. Enable DLL by setting bit 0 of EIM_DCR Register.

4. Enable EIM clock by setting bit 4 of EIM_WIAR Register.

5. Reset DLL by toggling bit 1 of EIM_DCR Register(1->0->1).

6. Wait for DLL lock (Both bit 0 and bit 1 of EIM_DSR Register are asserted).”

As we can see there is no need for setting specific (non-default) values for
bit fields of the EIM_DCR. It will achieve DLL locking automatically.

  The special internal DLL implements a master-slave structure, where a master measures the

cycle time, but  a slave is updated by the values, measured by the master at intervals, configured
in the EIM_DCR.   Also, it possible manual (slave) adjustment, provided via override OVERRIDE bit fields.

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keitanagashima
Senior Contributor I

Somebody, help me!

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