LCD RGB problem refresh mqx 4.0.2

[Microfelix]

Hello

I have a problem with the K70, CW 10.4 and MQX 4.0.2

Using a TFT RGB  display of 800x480.

When using the MQX 3.8, I LCDC_LPCR_PCD set to 3 (30MHz).

Now with MQX 4.0.2, even if imposed LCDC_LPCR_PCD 3, I get a flicker of the display.

How can I eliminate this problem by having a refresh rate of 30MHz?

Maurizio

[LuisCasado]

Hello,

You will have to review the configuration in the BSP, what PPL is used for the pixel clock PLL0 or PLL1 in  SIM_SOPT[LCD_LCDSRC], then the  SIM_SOPT2[LCD_CLKSEL]. And the fractional divider SIM_CLKDIV3[LCDCFRAC, LCDCDIV]. That defines the LCDC Pixel clock that you can divide inside the LCDC module.

Luis,

[Microfelix]

Hello

I tried to edit the registers of 'LCDC.

But unfortunately nothing.

It seems that if I lower the frequency gets better.

But lowering the refresh, I see the different pixels flashing.

There are examples of management by the LCD MQX 4.0.x?

Maurizio

[LuisCasado]

HI Maurizio,

Check this: https://community.freescale.com/thread/315253

Luis

[Microfelix]

hi luis

I have read about, that's my problem, it might depend on the CACHE LCD.

Is there a way to disable it and delete these flashes?

Maurizio

[LuisCasado]

Hi,

Previous MQX versions had the Cache disable due to some issues with USB stack.  But with cache enable the code in the threat I provided you , it is working. Have a look at function D4DLCDHW_FlushBuffer_K70LCDC(D4DLCD_FLUSH_MODE mode)

Luis

[Microfelix]

hi luis

I still have flicker problems.

I tried to increase the refresh rate of the LCD, but the flicker increases.

I noticed that this happens when I do the operations in DDR2.

I use the RAM as well as for the LCD, as well as RAMDISK and more.

Is there a way to give precedence to refresh the LCD, rather than the management of RAMDISK or the various memory allocations?

Maurizio

[LuisCasado]

HI Maurizio,

Yes. LCDC uses Master M4 channel to fetch data from DDR. You can play with the priorities of the Crossbar Switch. Check the chapter  18 AXBS Iin the RM.

lLuis

[Microfelix]

Thank you.

is complicated. I downloaded RM, but figuring out which is hard to register touch. There is no reference all'LCDC.

Can you be more specific.

Sorry. Maurizio

[LuisCasado]

Hi,

In the figure 3.11 you have where Masters and Slaves are connected to. LCDC is M4 and DDR is using three slaves, S5,S6,S7. Each slave has a priority level when a Master is accessing.  You can program also the policy when concurrent access of master to one slave.

Default configuration try to cover general use cases, but is programmable and it depends on the application.

You could start studying the default configuration and give more priority to M4 in DDR slaves. It is application dependent, I can't know what is the best for your case, you will have to play with the priorities.

Luis

[bradleywend]

I am also facing same issues with display option..What are the other alternatives of it? Is it supports Google apps security ?