What is the recommended PLL config register setting to achieve a bus frequency of 66.013MHz in the MCF5251 processor? We previously used the MCF5249 processor and used a PLL config register setting of 0x125A3101. This gave us a clock frequency of 132.0256MHz or a bus frequency of half that - 66.013MHz. I've tried a value of 0x1402E045. This results in a clock frequency that is half of what I'm looking for (I can verify this by looking at PSTCLK). When I change the CPUDIV divisor in the PLL config register from 4 to 2 (in order to double the frequency) my debugger immediately hangs. I can view the PSTCLK and see that it it 132MHz but the processor is not running. I understand there are only certain values that will work. What value in the PLL config register will work for me? The crystal frequency is 11.2896MHz. It is configured without a driver (using CRIN and CROUT). Could it be that the processor is actually running but it's the debugger that's hung. We use the P&E Micro USB Coldfire Multilink.
