Building an image for Flash; does not stay over power-cycle?

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Building an image for Flash; does not stay over power-cycle?

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mehdikarimibiuk
Contributor V

I am building for MCU MK10DN512ZVLL10 in code warrior. I am using a bareboard project and making a simple led flickering. My led is connected to PTA13.

After I configure things, I see that, the flash image "myimage.afx" seems to be volatile and does not stay in my flash since I do a power cycle and see that my led is not blinking anymore!

Any thought why this is happening?

Here is snapshot of my project below:

BTW, I do not have any problems with flashing my image to the MCU TWR kit that I have, and it works after power cycling (actually my MCU on tower is K60 not K10, but it should be similar for this question)...not sure for some reason why when I flash to my custom board, it does not work? Do I need to specify something in the bootloader? Where is the boot loader and where should I specify these things so that upon a power-cycle bootloader (if any) would know where my image is in the flash, if it preserves it?!!?

Thanks

Mehdi

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LuisCasado
NXP Employee
NXP Employee

Hello,

I understand that you're using a custom board. Could you check the level of pin EZP_CS? If EZP_CS is low while reset, the MCU will enter in eZPort mode instead of executing code out of flash.

Luis

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mehdikarimibiuk
Contributor V

Hi,sito

I can find it in my schematic, but did you mean I have to make sure this pin is not grounded?

Is is possible to configure this pin in PE?

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LuisCasado
NXP Employee
NXP Employee

Hello,

Yes, I mean in your hardware. That is a hardware condition to enter in eZPort mode. Not PE config.

Luis

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mehdikarimibiuk
Contributor V

sito

From schematic of our custom board I see that the port is not connected to anything. should it be driven high at all times, maybe? to avoid the chip enter eZPort mode instead of executing code out of flash?

As you stated, I also read from the boot sequence that:

...

"4. The RESET pin is released, but the system reset of internal logic continues to be held until the Flash Controller finishes initialization. EzPort mode is selected instead of the normal CPU execution if EZP_CS is low when the internal reset is deasserted. EzPort mode can be disabled by programming the FOPT[EZPORT_DIS] field in the

Flash Memory module."

Unitll we have this disucssed between the hardware team....

At least, if I want to confirm that flash has loaded my image, is there any way to figure this out?

Thanks

Mehdi

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LuisCasado
NXP Employee
NXP Employee

Hi,

The TWR system has the line EZP_CS_B connected to JTAG connector with a 0 Ohm resistor (DNP) not populated. I have seen some designs where the TWR was copied and the line connected to JTAG connector. JTAG tool tied that line to GND. You could try with a pull-up, but it is not needed.

Check also the Reset signal in your board.

You can check in the debug configuration (flash) that standard download and verify are checked. You can also check the memory in the memory window in the debug session. But if your configuration is Flash and you can run and debug your code, your flash is programmed.

Luis