I want to know the registers about the result and completion, when ADC's conversion is finished, using Port L.
Port L input is connected to ADC internal channel 5, please see Table 1-13 in the Reference Manual.
While PTAL register is used to configure which HVI pin is connected to ADC internal channel 5.
I know that the CCF bits of ATDSTAT and ATDDR0~5 registers present the completion flag and result value register for PAD0~5 port, not Port L.
I would like to know the conversion result and completion registers and How to use sample source for Port L.
Where are the result and conversion completion registers for Port L ?
Please advise me.