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Question asked by johan lantz on Dec 3, 2013
Latest reply on Dec 4, 2013 by Anson Huang

Normally the DDR clock are sourced via PLL2 – PFD2 and this source passes the PRE_PERIPH mux. The question is how the sub CCM register CCM_CBCMR are naming this mux. The pre_periph2 seams [22:21] to correspond to PFD2 but the question if it or pre_periph [19:18] should be used instead or both??