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RTL8201 for i.MX6

Question asked by Wilson Lin on Dec 3, 2013
Latest reply on Apr 9, 2014 by Wilson Lin

Hi all

 

I use Realtek RTL8201FN on i.MX6.

I'm following this to setup the chip clock to 50MHz.

(Use pin MX6Q_PAD_RGMII_TX_CTL__ENET_ANATOP_ETHERNET_REF_OUT)

https://community.freescale.com/message/346089#346089

 

I check mii info

MX6Q U-Boot > mii dev

MII devices: 'FEC0'

Current device: 'FEC0'

MX6Q U-Boot > mii info

PHY 0x00: OUI = 0x0732, Model = 0x01, Rev = 0x06, 100baseT, FDX

PHY 0x01: OUI = 0x0732, Model = 0x01, Rev = 0x06, 100baseT, FDX

 

Why do I have  two device PHY0 and PHY1?

 

I ping my server 192.168.1.2 but it's not work.

 

MX6Q Mlot U-Boot > ping 192.168.1.2

FEC: Link is Up 786d

Using FEC0 device

ping failed; host 192.168.1.2 is not alive

 

My IOMUX setting:

iomux_v3_cfg_t enet_pads[] = {

  MX6Q_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT,

  MX6Q_PAD_ENET_MDC__ENET_MDC,

  MX6Q_PAD_ENET_MDIO__ENET_MDIO,

  MX6Q_PAD_ENET_RXD0__ENET_RDATA_0,

  MX6Q_PAD_ENET_RXD1__ENET_RDATA_1,

  MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,

  MX6Q_PAD_ENET_TXD0__ENET_TDATA_0,

  MX6Q_PAD_ENET_TXD1__ENET_TDATA_1,

  MX6Q_PAD_ENET_TX_EN__ENET_TX_EN,

  MX6Q_PAD_ENET_CRS_DV__ENET_RX_EN,

  MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,

  MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,

  MX6Q_PAD_RGMII_TX_CTL__ENET_ANATOP_ETHERNET_REF_OUT,

};

 

Anyone can help , thanks

 

Regards

Wilson

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