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Creating full isolation between the cores

Question asked by ipp isl on Nov 28, 2013
Latest reply on Dec 5, 2013 by Timesys Support


Regarding vf6xx(cortex-a5/cortex-m4 cpu):


I want to create full isolation between 2 cores: one core will do communications , the other all the rest of the stuff including io.

I want the core that does communication have it's own memory and peripherals, But can't access in anyway the memory and peripherals of the other core. The only interface would be through the shared memory.

Is it possible to achieve this ? How ?