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TWR-AUDIO-SGTL bits not as advertised; VOL_BUSY_DAC_(channel) are both set/busy in CHIP_ADCDAC_CTRL all of the time.

Question asked by Robert Thompson on Nov 26, 2013

first up; I asked the wrong question before ( What am I doing wrong with TWR-SGTL-AUDIO, SCH-26816 REV B, why can't I seem to get LINEIN->DAP(Main)->DAC->LINEOUT working? ), went back to try to mark it 'not a question after all', or whatever, and found that the system decided I had never posted although I did not log out of freescale.com and I certainly did not change my (confirmed) email address - I am a little fearful this website is a bit broken but I have to persist!

 

 

When I start my set up and use UART based comms with my processor to have my code read (and report back to me) CHIP_ID I get 0xA011 which I have been able to confirm is the right response.

 

I read CHIP_ADCDAC_CTRL directly after power cycling (off for minimum 5 seconds) and find it equals 0x323C where I expect 0x20C based on the datasheet, I set it to 0x200 and read it back to find it is 0x3200 - nothing I have tried so far has cleared those busy bits and I am just stumped that they are persistently not the 'reset' value defined in the datasheet.

 

I have taken some pain to set the registers as outlined starting on page 26 of the datasheet ( http://cache.freescale.com/files/analog/doc/data_sheet/SGTL5000.pdf?pspll=1 ) carefully modified to my purpose and circumstances and those bits remain set and DAC->LINE-OUT remains silent.

 

Please help.

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