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i.MX6Q MMDC: Priority for 1 ARM core?

Question asked by Harald Krapfenbauer on Nov 21, 2013
Latest reply on Nov 25, 2013 by Anson Huang

Hi,

 

I'd like to know if the MMDC can be configured to give priority to core #1 (out of the 4 ARM cores) for memory access.

 

Thanks,

Harald

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