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S08RNA4 Internal clock setting

Question asked by Robin S on Nov 18, 2013
Latest reply on Nov 19, 2013 by Robin S

Hello Everybody,


Need help regarding internal clock setting of S9S08RNA4 freescale controller

   void main(void)









       __RESET_WATCHDOG();     // Watchdog Timer is enabled : is having 1 Khz Internal Default clock and Default Values of  appx. msec but

                                                   // in code m gettting 9.21 msec , don't know why


        ICS_C1 = 0x04;          // internal reference clock to FLL and FLL is generating 16000 Khz  ; Ref. Freqeuncy  is set at 31250 Hz * 512 = Appx.16 Mhz

        ICS_C2 = 0x00;            // BDIV = 00, Freq is now 16Mhz

        ICS_C3 = 0x60;             //Trimmed Value of Internal System Frequency





        PORT_PTAOE = 0x0F;                                                          // Define PortA (A0-A3) all Pin As Output  ; one is Output Enabled and Zero is Output Disabled for Data Direction

        PORT_PTBOE = 0x00;

        PORT_PTBIE = 0x30;                                       //  Define PortB (B4 and B5) as Input Pin  ; one is Input Enabled and Zero is Input Disabled for Data Direction


        PORT_PTAD =  0x00;                                                             // Initialise the PORTA

        PORT_PTBD =  0x00;                                                            // Initialise The PORTB





            PORT_PTAD =  0x0F;


            PORT_PTAD =  0x00;






void delay(int k) { 

      int delay ; 

      for (delay=0;delay<k;delay++); 






So in above code i am having two questions


1) Why i am getting Delay Period of 130µsec 'On' and 130µsec OFF .@ 16Mhz Frequency .I am expecting  1/16Mhz= 6.25 µsec

2) Default Reset time of Watchdog is appx. 4msec but i am getting 9.18msec .


please find Ref.manual for S9S08RN4


Thank you