Beyond what is in the i.MX6 Reference Manual, is there any information on the Display Controller's Microcode Processing Unit?
For example, how does the MPU use the template words? It seems that they are not processed in order since the driver only sets up template words 5,6,7,10,11,12 for my configuration.
The specific problem that I am attempting to fix is data placement by the Bus Mapping Unit. I am using YUYV data in the framebuffer. The driver sets up maps 5 and 6 such that YU should be placed on the parallel bus (disp0 bits 0 through 15) during the first phase and YV on the parallel bus during the second phase. Unfortunately, this is not happening. The data I place in the framebuffer does not get replicated properly on the parallel bus. I suspect the template words given to the MPU.
Also, I am looking for an explanation of how the mapping is done relative to the raw data. 184.108.40.206.1 Bus Mapping Unit describes the mapping actions being performed on 24 bits of each 32 bit word coming from memory. This would be appropriate for RGB if the frame buffer contained the bytes R G B 0 R G B 0 in increasing byte offset. 24 bits would ignore the already 0 byte. But for YUYV data, the bytes would be Y U Y V Y U Y V etc. How is is possible to map all data onto the output bus if only 24 bits are used?
Is the above related to W_SIZE and, if so, how is W_SIZE used? if I set W_SIZE such that 32 bit values are to be interpreted as 2 x 16 bit values, I do not see it using the lower 16 bits on one output phase and the upper 16 bits on the second output phase.