Help request for PowerPC MPC855T MMU setup

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Help request for PowerPC MPC855T MMU setup

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jerryn
Contributor I

I am trying to upgrade a legacy device which is equipped with 32MB SDRAM

with 64MB SDRAM, using memory of the same family, form and fit..

When the main program is modified using the guesstimated settings, it does

not work.  The issue appears to be in the MMU setup.

Not being familirar with setting this unit up, but making a stab at altering

the existing files was not successful.

The hardware has the correct jumpers for correct bank addressing of the

expanded memory range from 0xFE00 0000 to 0xFC00 0000

The application seems to be straight-forward as the address translations

from virtual to physical addresses are identical.

 

1.     The BR1 and OR1 have been changed to access these new addresses.

2.     

 

     The bootloader has been modified and appears to properly access the

new address space.

3.     

 

     The main program is being tested without a bootloader to eliminate

that variable.

4.     The BR1 and OR1 setting can be used with the original application

program, and runs normally

5.     

 

     When either the MMU setup is changed and the linkage set for the

expanded memory, it does not run.

6.     

 

     I have attached the original set up files and the altered files to

see if anyone can spot a glaring setup error(s).  Any help would be

appreciated.

 

1.     

 

     memory.h sets up BR1 and OR1

2.     

 

     MMU_config sets up the TLBs

3.     

 

     the *.dld files are the linker command files      

 

.

 

Jerry

 

Original Attachment has been moved to: memory_64MB.h.zip

Original Attachment has been moved to: inkjet_64MB.dld.zip

Original Attachment has been moved to: memory_32MB.h.zip

Original Attachment has been moved to: MMU_config_64MB_RAM.c.zip

Original Attachment has been moved to: MMU_config_32MB_RAM.c.zip

Original Attachment has been moved to: inkjet_orig32MB.dld.zip

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1 Solution
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LPP
NXP Employee
NXP Employee

This processor provides 32 data and 32 instruction TLBs. Your MMU initialization tries to define more than 32 entries. 48MB requires less entries and thus it works.

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3 Replies
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jerryn
Contributor I

An update.  Modifying the files for 48MB works.  56MB and 64MB do not.  The issue seems to be with MMU_config.

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598 Views
LPP
NXP Employee
NXP Employee

This processor provides 32 data and 32 instruction TLBs. Your MMU initialization tries to define more than 32 entries. 48MB requires less entries and thus it works.

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597 Views
jerryn
Contributor I

Thank you for your answer.  It is appreciated!!

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