PMIC MMPF0100F0EP Fails to Start up (Design based on SDP)

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PMIC MMPF0100F0EP Fails to Start up (Design based on SDP)

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jh_zhao
Contributor I
Design

Based on SDP. The system is battery powered, using one single cell Li-P battery. Differences with SDP on power section: SDP uses two chargers (MAX8903); whereas my system uses one charger (MAX8903).

Symptoms

Upon power button press, system fails to boot, with LCD and on-board LEDs blinking. Input to PMIC, PMIC switching outputs all exhibit severe dip every 37ms. VSNVS and IMX6_ONOFF also dips slightly. If the battery is removed and re-plugged again, the system can always power up without fail. There are still dips in voltages, but they quickly settle down.

PMIC Input at pin 23 (below):

003-brd15-no-rework-bootup-fail-pmic-pin23_voltage(pressing-power-button).jpg

PMIC switching ouput VDDCORE (below):

VDDCORE-(SW1AB)_Board15_Failing_To_Power_Up.jpg

VSNVS (powered by external LDO) also dips slightly (below):

brd5-with-workaround1-fail-to-boot-vsnvs(at-d10).jpg

IMX6_ONOFF (below):

brd5-with-workaround1-fail-to-boot-mx6_onff(at-R22).jpg

If battery is removed and re-plugged, there are a dozen dips and then the supplies all stabilize. The system can always boot up successfully. Shown below is Vin to PMIC:

004-brd15-no-rework-boot-success-pmic-pin23_voltage(re-plugging-battery).jpg

There was a typo in the title. We are using F0 programmed part. Message was edited by: JIHUA ZHAO

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JorgeRama_rezRi
NXP Employee
NXP Employee

By the way,

Since you are using the not programmed version of the PF0100, how are you programming the default voltages and start-up sequence?

Best regards.

Jorge.

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jh_zhao
Contributor I

Hi Jorge

Typo in the title. We're using F0.

Best regards,

Zhao.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Zhao,

Just wondering if you saw my last message or if you need anything else from me.

Best regards.

Jorge.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi,

- Would it be possible to have your schematic to check for possible issues?

- Are you able to test the application with a 5A voltage source instead of a batter?

Best regards.

Jorge.

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jh_zhao
Contributor I

Hi Jorge

I've sent the schematic to you via message.

We've tested powering up board with 5A DC. Results:

DC alone: boots up.

Battery alone:

     1) boots up when battery is fully charged (battery always connected)

     2) fails to boot up when battery capacity falls below around 60% and battery is always connected;

     3) boots up if removing and re-connecting battery, even with a very low battery (even a few percent can boot up).

     4) also tried two battery in parallel, symptom same as 2).

DC and battery:

     1) boots up with fully charged battery

     2) fails to boot up when battery capacity falls below around 60%.

Battery used: 4100mAh, Li-P, max discharge current 2.5A.

Thanks & best regards,

Zhao.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Zhao,

Ok, I think I know what's happening. I assume your battery is 3.7V, right? If so, 60% of that voltage is too low. The MMPF0100 only assures correct functionality when VIN > 2.8V, so if your battery is discharged below that voltage, it will have trouble with power-on events, so you have to charge it again when it reaches this point. Is this the case?

If this is not the case and we need to continue debugging, I received your message, but couldn't download the schematics because the link seems to be broken. Maybe it will be easier if you could please send me the schematics directly to jorge.ramirez@freescale.com.

Best regards.

Jorge.

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jh_zhao
Contributor I

Hi Jorge

Schematic has been sent to you.

60% means capacity, not voltage. At that capacity battery is still around 3.9V, as can be seen in the first waveform (see above PMIC Input at pin 23 (below):)

Best regards,

Jihua.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Jihua,

Thanks for the clarification.

- I reviewed your schematic and everything looks good in general, just noticed one detail: Seems like your design is based in old versions of the SDP. For new versions, the input capacitance requirements of the PMIC have changed. I'm attaching rev C4. Please notice, for example, that pins Vin1, Vin2 and Vin3 of the PMIC have 0.47uF instead of 0.1. Could you please try this change on your board? I'm wondering if the capacitance at the SYS_4V2 net could be affecting.

- VCOREREF output capacitor changed too.

- What's the current being drawn out of the battery when the voltage drops occur?

- Another possible issue is the battery itself. Could you please try replacing the battery with a DC voltage source with the same capabilities of the battery?


Please let me know the results and I'll keep investigating until we get to the bottom of this issue.

Best regards.

Jorge.

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jh_zhao
Contributor I

Hi Jorge

Thank you very much for the attached latest revision of SDP and sorry for following up late.

I've measured VCOREDIG and VCORE, both of them exhibit severe drop. But I've not measured VCOREFEF and haven't tried out the capacitor changes. However, I've some new findings so far.

Finding#1: If charger (MAX8903) is bypassed by connecting battery to SYS_4V2 domain, the board can boot up consistently. Tested over 4 boards and 2 batteries across different battery levels.

Finding#2: After adding 2.2mF cap to SYS_4V2 domain (original circuitry, charger is in-between battery and SYS_4V2), the board can boot up consistently. So far I've only tested on one board.

To answer some of your questions:

What's the current being drawn out of the battery when the voltage drops occur?

Current spike is exceeding large, see below:

brd14-bat-current.jpg

Another possible issue is the battery itself. Could you please try replacing the battery with a DC voltage source with the same capabilities of the battery?

Tried simulating battery using DC (DC connected to charger BAT pins), board can only boot up when DC is equal to or greater than 4.1V.

If 4.2V DC is fed into SYS_4V2 domain and battery is removed, board can always boot up.

If 5V DC is fed into DC jack and battery is removed, board can always boot up.

Thanks & regards,

Jihua.

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JorgeRama_rezRi
NXP Employee
NXP Employee

Hi Jihua,

Ok, so the problem seems to be PMIC input capacitance then. How much capacitance do you have at the SYS_4V2 node? Please note that our SDP has around 155uF. Is incrementing the capacitance a suitable workaround for you? If you need any more details about PMIC input capacitance, I can contact the designers.

Best regards.

Jorge.

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JorgeRama_rezRi
NXP Employee
NXP Employee

By the way,

Could you please add VCOREDIG, VCOREREF and VCORE to the scope shots?

Thanks!

Jorge.

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