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Need spec for ENET_REF_CLK and PCI_E clock(CLK1_P/N) in MX6Q

Question asked by jim.lin Employee on Nov 1, 2013
Latest reply on Nov 5, 2013 by Yuri Muhin
Branched to a new discussion



can't find the detailed requirement for the follow two clock: 1. ENET_REF_CLK, 2. PCI_E clock supplied from CLK1_P/CLK1_N.


Need the following information for reference:


OSC/125MHz for ENET_REF_CLK (#V22) : VIH VILTolerance High time Low timeRise time Falling time Jitter


PCIE/100MHz for CLK1_P/N (#C7,#D7) : Duty cycleToleranceRise time Falling time JitterVoltage swing

The information is required to choose the right components when composing the schematics.

Thank you,