In P1010, there is only one interrupt number for the Job Ring in the Security Engine. But there are 4 job rings, do they share a single interrupt?

[haowang]

There are 4 Job Rings in the P1010 SEC (SEC 4.4) and chapter 4.2.1.4 says they each have a separate interrupt line. But according to the SoC RM only internal interrupt 29 is assigned to the Job Ring.

So you cannot assign all 4 rings to individual interrupt pin on the PIC. It seems they all share a single interrupt, could you please verify this? Or how should I handle the interrupt for 4 job rings.

Thanks.

[bpe]

There is no contradiction between the Security RM and the chip RM. The Security RM, Section  4.2.1.4 correctly says that there are separate interrupt lines

for each Job Ring. Their status is reported individually in JRINTRx , see Section 3.4.10 of the same document. At the platform level, all these events are

reported via internal interrupt #29. The interrupt handler routine should check JRINTRx of the active rings to establish the ring(s) that require servicing.