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The maximum Data transfer at KL1x

Question asked by Yuriy Tarnopolskiy on Oct 25, 2013
Latest reply on May 30, 2014 by Yuriy Tarnopolskiy

Hello! I'm starting to learn Kinetis KL1x General Purpose MCUs, coming from MSP world. For rapid development of Cortex M0+ Core I would like to get answers to the following questions: 

    1. What is the maximum data transfer can be achieved when the data going in the external port and when reading from a port? As I understand this speed is equal to the Peripheral Module frequency - 24 MHz. Can I find anywhere Sample code which performs reading the data from the external parallel bus? I am interested in, for example, perform  reading a short sequence of data from external parallel 8-bit ADC at 24 MHz and writes it’s to the Kinetis RAM memory. Or as alternative - the realization at Kinetis KL1x synchronous FIFO controller with 24 MHz frequency and volume 2 KB? 
    2. Whether DMA may provide a data transfer rate at 24 MHz frequency?
    3. Is it possible to provide 48MHz Kinetis Core frequency when I use a 24 MHz frequency Oscillator crystal or resonator?

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