I have a system in which I detect RAM by writing and reading till I get an error . To test this I set the MMDC0_MDASP for cs0 to a value less than the total ram on board. The system hangs on the access. or possibly goes to an unpredicatable abort. It is fine if it gets past the actual installed ram however. I preset the data abort vector to a custom routine, but it doesn't behave properly. It looks like the controller is retrying the address, producing repeated aborts.
I have checked that the routines on the vector behave correctly by doing a LDR from the top of PCIe space, which aborts predictably.
Can anyone shed any light on this?