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Sanity check on setup for uart1 imx6 please?

Question asked by John Ballance on Oct 15, 2013
Latest reply on Oct 18, 2013 by John Ballance

Hi

running bare metal, I have a loader that loads code at 0x17800000 .. cf uboot.

 

I need a serial debug port asap, so want to set it up BEFORE turning any mmu stuff on. This means I have to set up all relevant clock.pad.mux, etc settings, as well as the actual uart.

 

The assembler I use for this is below. Can anyone suggest what I've missed?  Please assume I've set the base addresses to the correct values for physical addresses

 

Thanks in advance  (& is equivalent to 0x)

 

HAL_UARTStartUp

; first setup pads,pins, and clock sources

        ldr     a2, [sb, #:INDEX:IOMUXC_Base]

        ldr     a3, =0x1b0b0             ; pad drive stuff

        str    a3, [a2,#IOMUXC_SW_PAD_CTL_PAD_EIM_D19-IOMUXC_BASE_ADDR]     ; cts

        str    a3, [a2,#IOMUXC_SW_PAD_CTL_PAD_EIM_D20-IOMUXC_BASE_ADDR]     ; rts

        str    a3, [a2,#IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT10-IOMUXC_BASE_ADDR]

        str    a3, [a2,#IOMUXC_SW_PAD_CTL_PAD_CSI0_DAT11-IOMUXC_BASE_ADDR]

        mov    a3, #3                  ; alt3

        str    a3, [a2,#IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT10-IOMUXC_BASE_ADDR]  ;txd

        str    a3, [a2,#IOMUXC_SW_MUX_CTL_PAD_CSI0_DAT11-IOMUXC_BASE_ADDR]  ;rxd

        mov    a3, #1                  ;UART1_UART_RX_DATA_SELECT_INPUT

        str    a3, [a2,#IOMUXC_UART1_IPP_UART_RXD_MUX_SELECT_INPUT-IOMUXC_BASE_ADDR]

        str    a3, [a2,#IOMUXC_UART1_IPP_UART_RTS_B_SELECT_INPUT-IOMUXC_BASE_ADDR]

        ldr     a2, [sb, #:INDEX:CCM_Base]

; root clock o/p to uart

        ldr    a3, [a2,#CCM_CSCDR1_OFFSET]

        bic    a3, a3, #&3f        ; ensure uart_podf set to 1

        str    a3, [a2,#CCM_CSCDR1_OFFSET]

; turn on uart clock supply     

        ldr    a3, [a2,#CCM_CCGR5_OFFSET]

        orr    a3, a3, #&f<<24        ; ensure uart clock and serial clock on

        str    a3, [a2,#CCM_CCGR5_OFFSET]

 

; now set uart registers up

        BaseAddr

        mov     a2, #1                         ;reset UART state machines

        str     a2, [a1, #UART_UCR2_OFFSET]

        mov     a2, #&60<<8

        add    a2, a2, #&66                   ;UCR2 = 8n2,IRTS,CTSC,TXEN,RXEN=1,reset clr

        str     a2, [a1, #UART_UCR2_OFFSET]

        mov     a2, #1                         ;UARTEN = 1,enable the clock

        str     a2, [a1, #UART_UCR1_OFFSET]

        mov     a2, #0x4

        str     a2, [a1, #UART_UCR3_OFFSET]    ;set RXD_MUX_SEL bit

        ldr     a2, [a1, #UART_UFCR_OFFSET]

        bic     a2, a2, #7<<7

        orr     a2, a2, #5<<7                  ;set RFDIV to div-by-1 or b101

        str     a2, [a1, #UART_UFCR_OFFSET]

        mov     a2, #0x4

        str     a2, [a1, #UART_UBIR_OFFSET]

        mov     a2,#0xd8

        str     a2, [a1, #UART_UBMR_OFFSET]

        MOV     pc, lr

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