Writing to RAM resets the MPC5668G

[pierreschmidt]

Hello,

I have a programm in assembly language which generates a reset on the MPC5668G (the DS3 red LED on the MPC5668EVB turns on) when writing into RAM.

There is word 0x015A0000 at 0x10000 which is a correct RCHW so that execution starts in flash at address 0x1001C (__start) with following code:

__start:
                                                     ; nop statements included to allow debugging with iSystem debugger
                                                     ; jump to the second nop statement to test resets
   e_ori r0,r0,00000000
   e_ori r0,r0,00000000
  

; Setup exception registers
   e_lis       r1, _ivor@ha                              ; Load address of exception handler
   e_add16i    r1, r1, _ivor@l
   mtspr       63, r1                                    ; Initialize IVPR with high word
   mtspr       400, r1                                   ; Initialize IVOR0 with low word
   mtspr       401, r1                                   ; IVOR1
   mtspr       402, r1                                   ; ...
   mtspr       403, r1
   mtspr       404, r1
   mtspr       405, r1
   mtspr       406, r1
   mtspr       407, r1
   mtspr       408, r1
   mtspr       409, r1
   mtspr       410, r1
   mtspr       411, r1
   mtspr       412, r1
   mtspr       413, r1
   mtspr       414, r1                                   ; ...
   mtspr       415, r1                                   ; IVOR15
   mtspr       528, r1                                   ; IVOR32
   mtspr       529, r1                                   ; ...
   mtspr       530, r1                                   ; IVOR34

; Initialize memory pointer registers
_no_init_l2ram:
   e_lis       r1, __SP_INIT@ha                          ; Initialize stack pointer r1 to
   e_add16i    r1, r1, __SP_INIT@l                       ; value in linker command file.
   e_lis       r13, _SDA_BASE_@ha                        ; Initialize r13 to sdata base
   e_add16i    r13,r13,_SDA_BASE_@l                      ; (provided by linker).
   e_lis       r2, _SDA2_BASE_@ha                        ; Initialize r2 to sdata2 base
   e_add16i    r2, r2,_SDA2_BASE_@l                      ; (provided by linker)

_romcopy:
                                                         ; Set GPR9 to the count of the SRAM load size
   e_lis       r3, __ROM_COPY_SIZE@ha                    ; Load upper SRAM load size (# of bytes) into R9
   e_add16i    r3,r3, __ROM_COPY_SIZE@l                  ; Load lower SRAM load size into R9
                                                         ;  The "." sets the condition flag
   e_cmp16i    r3,0

   e_bc        01,02,_romcopy_end                              ; Exit cfg_ROMCPY if size is zero

   e_andi      r6, r3, 0x03

   se_srwi     r3, 2
   mtctr       r3                                        ; Store # of bytes to be moved in spr CTR

   e_lis       r10, __TEXT_ROM@ha                        ; Load address of first SRAM load into R10
   e_add16i    r10,r10, __TEXT_ROM@l                     ; Load lower address of SRAM load into R10
   e_addi      r10,r10, - 4                              ; Decrement address to prepare for ROMCPYLOOP   

   e_lis       r5, __DATA_RAM_START@ha                   ; Load upper SRAM address into R5
   e_add16i    r5, r5, __DATA_RAM_START@l                ; Load lower SRAM address into R5
   se_subi     r5,4                                      ; Decrement address to prepare for ROMCPYLOOP

_romcopy_dataloop:
   e_lwzu      r4, 4(r10)                                ; Load data byte at R10 into R4,incrementing (update) ROM address
  e_stwu      r4, 4(r5)                                 ; Store R4 data byte into SRAM at R5 and update SRAM address
   e_bc        02,00,_romcopy_dataloop                   ; Branch if more bytes to load from ROM

   e_cmp16i    r6,0
   e_bc        01,02,_romcopy_end

The instruction which causes the reset is e_stwu      r4, 4(r5) which writes contents of R4 to the location pointed by R5+4

Is there a special initilisation to do prior to writing in RAM??

Thanks a lot.

Pierre.

[markelson]

Hi Pierre,

You do need to initialize the ECC check bits . Here is the extract from the reference manual for the 5668G:

10.4 Functional Description

ECC checks are performed during the read portion of an SRAM ECC read/write (R/W) operation, and

ECC calculations are performed during the write portion of a read/write (R/W) operation. Because the

ECC bits can contain random data after the device is powered on, you must initialize the SRAM by

executing 64-bit write instructions to the entire SRAM. For more information, refer to Section 10.8,

“Initialization and Application Information.”

I expect you can find an example crt0.asm in the examples folder of the Codewarrior folder that does this.

HTH,

Mark