Maximum speed of QuadSPI

[tomokiokuno]

Hi all,

We have a question similar to the thread No.349242.

According to the table 9-10 in the reference manual, We would like to use the QuadSPI at 104MHz,

but there is a description of "Maximum baud rate supported at SPI output(serial) is 83MHz" in the reference manual p.630.

Dose it mean that "Maximum baud rate supported at QuadSPI output(serial) is 83MHz"?

Also in the datasheet "QuadSPI timing(p.58)",  there is a description of 80MHz.

(if a clock length is 12.6ns, it mean that frequency is 79MHz)

Is it not possible that We use the QuadSPI at 104MHz?

Best Regards,

Tomoki

[naoumgitnik]

Dear Tomoki,

I would recommend you following the Datasheet as the controlling document.

I will do my best to take care of this discrepancy in the next revision of our documentation.

Regards, Naoum Gitnik.

[tomokiokuno]

Dear Naoum,

That means, "Maximum baud rate supported at QuadSPI output(serial) is 80MHz"?

In that case, in accordance with Figure 9-4 of the reference manual,

I am going to use the PLL3_PFD4 as QuadSPI base clock.

Best Regards,

Tomoki

[naoumgitnik]

Dear Tomoki,

It took me some time to fully clarify it - the max. figure is 83MHz.

Sorry for inconvenience! - Both the Datasheet and Reference Manual will be corrected.

Regards, Naoum Gitnik.

[tomokiokuno]

Dear Naoum,

Contradiction exists by comparing the reference manual [table 9-10] and datasheet [Quad SPI Timing].

Reference manual is described to be able to set up to 104MHz.

On the other hand, datasheet is described as if it is 80MHz.

Which one is correct?

Best Regards,

Tomoki