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USB1 host-mode port reset issues with high-speed devices

Question asked by Ian Kalinowski on Oct 7, 2013
Latest reply on Dec 1, 2014 by richard_stulens

I've noticed some questionable behavior in the PORTSC1 register for USB1 in host-mode when connecting/disconnecting high-speed devices.  This issue does not occur with low-speed or full-speed devices.  The first time I connect a high-speed device to USB1 (J12 on the Vybrid MPU board), the PORTSC1.CSC (bit 1) and PORTSC1.CCS (bit 0) bits get set, indicating that a new device was connected.  I then set PORTSC1.PR (bit 8) to reset the port, then wait until the EHCI controller clears PORTSC1.PR, at which point the EHCI controller sets PORTSC1.PE (bit 2) to indicate that it has enabled the port.  For example:

 

    (I connect a high-speed device)

 

    Read:  0x10001803    (controller sets CSC and CCS to indicate a new connection)
   
    Write: 0x10001803    (clear the CSC flag)

 

    (wait 100 milliseconds)

 

    Read:  0x10001801    (CCS is still set as the device is still connected)

 

    Write: 0x10001901    (tell the controller to reset the port)

    (spin-wait until PORTSC1.PR is cleared)

 

    Read:  0x18001205    (controller has cleared PR and set PE)

 


So far, so good.

 


When I disconnect the high-speed USB device, the EHCI controller sets PORTSC1.PEC (bit 3) and PORTSC1.CSC (bit 1) to indicate that the device was disconnected and the port is disabled.  For example:

 

    (I disconnect the high-speed device)

 

    Read:  0x1c00100a    (controller sets PEC and CSC)

 

    Write: 0x1c00100a    (clear the PEC and CSC flags)

 

    Read:  0x1c001000    (nothing is connected to the port)

 


So far, so good.

 


The questionable behavior occurs after I reconnect the original high-speed device back to USB1 (J12).  In this case, after I set PORTSC1.PR and wait for the EHCI controller to finish resetting the port, PORTSC1.PE does not get set to indicate that the EHCI controller enabled the port.  For example:

 

    (I reconnect the high-speed device)

 

    Read:  0x10001803    (controller sets CSC and CCS to indicate a new connection)

 

    Write: 0x10001803    (clear the CSC flag)

 

    (wait 100 milliseconds)

 

    Read:  0x10001801    (CCS is still set as the device is still connected)

 

    Write: 0x10001901    (tell the controller to reset the port)

 

    (spin-wait until PORTSC1.PR is cleared)

 

    Read:  0x1c00100a

 

    (strangely, the controller set PEC and CSC to indicate that the connection status changed; notably, PE is clear to indicate that the port is disabled and CCS is clear to indicate that the device is not connected)

 

    Subsequent reads from PORTSC1 returns 0x1000180b (PE = 0, CSC = 1, CCS = 1), indicating that the a device is connected but the port is disabled.

 


From this point forward, attempting to reset the port (by setting PORTSC1.PR) results in the same behavior when a high-speed device is connected.  If a low-speed or full-speed device is connected, the port properly resets; however, when subsequently connecting a high-speed device, the controller fails to enable the port after the port is reset.

 


It appears that resetting the entire EHCI controller will allow the port to properly reset again but this approach seems a bit overkill.  Is there a better way to work around this issue aside from resetting the entire controller?  If possible, I'd prefer not to use USB PHY interrupts (though I haven't investigated this approach).

 

In case it helps, I've set ENUTMILEVEL3, ENUTMILEVEL2, ENHOSTDISCONDETECT in USBPHY1_CTRL (by the way, ENHOSTDISCONDETECT should probably be mentioned in Table 8-19 in the Vybrid Reference Manual).

 

 

 

Thanks,

Ian

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