S12XDP512 - How to use external RAM on CS2 in conjuction with ROMHM bit

[pufi]

Hi Forum,

we have an external RAM connected to CS2 chip select.
This select the external RAM on address $14_0000

To get an access to this memory we set the ROMHM=1
(as mentioned in DataSheet rev 2.15 p. 674)

Using this setup, it seems that this CS2 is in collision with
the internal Flash placed at address $14_4000.

How to set the ROMHM bit to get right access to this
external RAM?

How should we access the internal Flash page $4000-$7fff?

Thanks for your help

Regards
Paul

[kef]

pufi wrote:
Hi Forum,

we have an external RAM connected to CS2 chip select.
This select the external RAM on address $14_0000

To get an access to this memory we set the ROMHM=1
(as mentioned in DataSheet rev 2.15 p. 674)

Using this setup, it seems that this CS2 is in collision with
the internal Flash placed at address $14_4000.

I wonder what collision could you observe? Do you see all FFFF's at $4000..$7FFF? Maybe it's read-only instead of read-write? BTW, is external memory bus really enabled?

How to set the ROMHM bit to get right access to this
external RAM?

MMCCTL1 |= 2;  // something like this probably?

How should we access the internal Flash page $4000-$7fff?

$4000-$7FFF is accessible using global memory addressing at $7F_4000..$7F_7FFF or in the PPAGE paged memory window at $8000..$BFFF when PPAGE==$FD

Regards

[pufi]

Hi Kef,

thanks for your help,

But I still do not understant correctly the ROMHM bit.
Why do I need to switch this bit to 1 when I access the external RAM on CS2?

In my setup I set the ROMHM=0 and the external access
works on the address $14_4000.

But the address area 14_0000 - 14_3FFF returns wrong values (not a FF's)

I think that the s12DPx512 data sheet ont the p. 674 is not correct.
In case of the external acces the  ROMHM bit  should be set to  0 and not to 1.

Regards
Paul

[kef]

You don't have to touch ROMHM to access external RAM on CS2. ROMHM controls only what is mapped from global memory map to CPU local addresses $4000.7FFF. ROMHM=0 maps flash page $FD to 4000-7fff. ROMHM=1 maps to 4000..7FFF global addresses 14_4000..14_7FFF, which are external memory (on CS2 if enabled).

You write that 14_0000..14_3FFF don't return FFs. I think it's normal. It's external memory. I would expect FFs here if it was erased flash or just pullups on data lines.

Table on page 674 tells what is mapped to CPU's local addresses $4000..$7FFF from global memory, not what is mapped from 4000-7fff to global memory. It's correct: ROMHM=0 means flash page $FD is mapped to $4000.7FFF. ROMHM=1 means external memory (14_4000-14_7FFF) is mapped to $4000-$7FFF.

Hope I understood your questions

[pufi]

Hi Kef,

you are right, your setup works.
Thanx!

I summarize:

 When the ROMHM=0 then the 16k FLASH page at address 0x7F4000 is mapped in to the address 0x4000. With other words, the FLASH page 0x7F4000 (PPAGE=0xFD) is accesible at address 0x4000.

 When the ROMHM=1 then the external 16k address space 0x144000-0x147fff is mapped to the address 0x4000.  With other words, the external space 0x144000-0x147fff is accessible at address 0x4000.

 In both cases is the external space 0x144000-0x147fff accessible with GPAGE register access.

Best regards
Paul