[reposting, had it in the wrong forum before..]
Say a userspace process on Linux on the A5 downloads a large signal file into memory (DDR3). I make the assumption that because this is Linux, there is an MMU active, the the underlying physical memory backing the allocation may not be contiguous..
what's involved in enabling the M4 to look into that buffer and play back the signal through the DAC?
Is there a path whereby the process on A5 side can explicitly allocate a chunk of contiguous memory that is linearly mapped, populate it, and then inform the M4 where it is in physical RAM.
I am sure I have some faulty assumptions here; the underlying idea is can I have both processors able to access a single large buffer in DDR3.