AnsweredAssumed Answered

Clock setting of coldfire MCF54418

Question asked by Muhamamad Uzair on Sep 4, 2013
Latest reply on Sep 6, 2013 by TomE

Hi,

 

I have been working on bareboard programming of MCF54418 (cold fire v4). I am using PE multilink BDM to program the processor's SRAM.  The problem is when I change the clock settings by writing PLL_CR, PLL_DR register my debug interface hangs. What I suspect,  due to change in clock BDM lost its connection. So I tried to reset processor using soft reset but it doesn't work. Below is the clock snippet i am using to change clock settings.

 

Can any body help me to find out what's wrong in it? Any help would be highly appreciated

 

MCF_CCM_CCR = 0x8502U;
MCF_CCM_MISCCR = 0x0018U;
MCF_CLOCK_PLL_CR = 39U;
MCF_CLOCK_PLL_DR = 1U; // Both debugger and processor hangs after executing this instruction

 

MCF_RCM_RCR = 0x80U;  // it should reset processor

Regards,

Uzair

Outcomes