I am using the VF5xx in a design for which the 1.5MB on-chip RAM is sufficient.
How should the DDR pins be connected in the design, given that they are unused?
So far I am assuming the following.
1. SDRAMC_VDD2P5 pins are connected to DECAP_V25_LDO_OUT.
2. SDRAMC_VDD1P5 pins are left floating
3. The following pins are connected to VSS:
DDR_A, DDR_D, DDR_BA, DDR_DQM, DDR_DQS, DDR_ODT, DDR_CAS,
DDR_CKE, DDR_CLK, DDR_CS, DDR_RAS, DDR_WE,
DDR_VREF, DDR_ZQ, DDR_RESET.
Is this correct?