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IMX6SL and SSI2

Question asked by Nick Stoughton on Aug 14, 2013
Latest reply on Jan 23, 2014 by Nick Stoughton

Has anyone had any successful experience using SSI2 as an I2S slave with a microphone codec connected to it?

 

I have an experimental driver for a microphone codec that appears to be doing all the right things electrically ... it is an I2S master, it is producing the bit clock and frame sync clocks at the right rate, is supplying data aligned to the rising edge of the bit clock, etc. It is connected to AUDMUX port 5. I have the AUDMUX setup like this:

 

PTCR5 = 0

PDCR5 = 0x00002000

 

PTCR2 = 0x0039C000

PDCR2 = 0x00008000

 

(note the codec signals are connected to RxC, RxFs and RxD, so we are in async mode).

 

SSI2 is setup like this:

stx0 = 0x00000000

srx0 = 0x00000000

scr = 0x00000445

sisr = 0x00001001

stcr = 0x0000028d

srcr = 0x0000028d

stccr = 0x00040000

srccr = 0x00016100

sfcsr = 0x000000dd

 

However, no interrupt or DMA event is ever generated. Anyone got any ideas what I'm doing wrong?

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