hi :
when I transplant the uboot I got a problem witch are signed with the red color :
U-Boot 1.3.0 (Aug 12 2013 - 02:17:44) MPC83XX
Reset Status:
CPU: e300c3, MPC8313E, Rev: 21 at 333.333 MHz, CSB: 166 MHz
Board: Freescale MPC8313ERDB
I2C: ready
DRAM: 128 MB
FLASH: 8 MB
NAND: Bad block table not found for chip 0
Bad block table not found for chip 0
No space left to write bad block table
128 MiB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: TSEC0, TSEC1, ax88796b [PRIME]
=>
In fact , my nand size is 4GiByte,,I have chagned the codes as following:
1、 /uboot/include/configs/MPC8313ERDB.h
#define CFG_NAND_OR_PRELIM (0xFFFF8000 /* length 32K */ \
| OR_FCM_PGS /*add by me for large page&block*/ \
| OR_FCM_CSCT \
| OR_FCM_CST \
| OR_FCM_CHT \
| OR_FCM_SCY_1 \
| OR_FCM_TRLX \
| OR_FCM_EHTR )
#define CFG_NAND_PAGE_SIZE (8192) /* NAND chip page size(Byte) changed by asky */
#define CFG_NAND_BLOCK_SIZE (1024 << 10) /* NAND chip block size chaned by asky*/
2、/uboot/board/freescale/mpc8313erdb/nand_ids.h
{"NAND 4GiB 3,3V 8-bit", 0x68, 8192, 4096, 0,NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR}, //add by asky
3、/uboot/board/freescale/mpc8313erdb/nand.c
else if(mtd->oobblock == 8192) { //add by asky
lbc->bank[fcm->bank].or |= OR_FCM_PGS;
/* adjust ecc setup if needed */
if ((lbc->bank[fcm->bank].br & BR_DECC) == BR_DECC_CHK_GEN) {
mtd->eccsize = 8192;
mtd->oobavail -= 9;
this->eccmode = NAND_ECC_HW12_2048;
this->eccsize = 8192;
this->eccbytes += 9;
this->eccsteps = 1;
this->autooob = (fcm->fmr & FMR_ECCM) ?
&fcm_oob_lp_eccm1 : &fcm_oob_lp_eccm0;
memcpy(&mtd->oobinfo, this->autooob,
sizeof(mtd->oobinfo));
}
}
Are these enough ?anyone can help me ?
Please use a current U-Boot. 1.3.0 is very old and probably doesn't properly support large-page NAND on eLBC (among other issues).
Also, you need to constrain yourself to 2K-page NAND chips. Larger page sizes are not supported by this controller. There is an unsupported hack that perhaps will make 8K-page NAND work:
[U-Boot,v4] nand: Hack to support 4k page in fsl_elbc_nand - Patchwork
However, in addition to the patch being whitespace-mangled (i.e. difficult to apply) and possibly needing updates for the latest U-Boot tree, it has not completed final review and is hacky in nature (the hardware was not designed to support this). Be sure you understand what it is doing (especially bad block management) and evaluate its suitability for yourself.
Recently,I have done something with the NAND ,and I have a problem :
NAND: NAND device: Manufacturer ID: 0x2c, Chip ID: 0x68 ( NAND 4GiB 3,3V 8-bit)
pagemask : ffffffff ;i : -1 ;al : 1
pagemask : ffffffff ;i : 16777215 ;al : 2
pagemask : ffffffff ;i : 65535 ;al : 3
pagemask : ffffffff ;i : 255 ;al : 4
fcm_init: 6 address bytes is not supported
0 MiB
I find the code at /uboot-1.3.0/board/freescale/mpc8313erdb/nand.c
static int fcm_scan_bbt(struct mtd_info *mtd)
{
volatile immap_t *im = (immap_t *) CFG_IMMR;
volatile lbus83xx_t *lbc = &im->lbus;
register struct nand_chip *this = mtd->priv;
struct fcm_nand *fcm = this->priv;
unsigned int i;
unsigned int al;
if (!fcm) {
printk(KERN_ERR "fcm_scan_bbt():" \
" Failed to allocate chip specific data structure\n");
return -1;
}
/* calculate FMR Address Length field */
al = 0;
for (i = this->pagemask >> 16; i ; i >>= 8) {
al++;
printk ("pagemask : %x ;i : %d ;al : %d\n",this->pagemask,i,al); //add by asky
}
/* add to ECCM mode set in fcm_init */
fcm->fmr |= 12 << FMR_CWTO_SHIFT | /* Timeout > 12 mSecs */
al << FMR_AL_SHIFT;
if (mtd->oobblock == 512)
lbc->bank[fcm->bank].or &= ~(OR_FCM_PGS);
else if (mtd->oobblock == 2048) {
lbc->bank[fcm->bank].or |= OR_FCM_PGS;
/* adjust ecc setup if needed */
if ((lbc->bank[fcm->bank].br & BR_DECC) == BR_DECC_CHK_GEN) {
mtd->eccsize = 2048;
mtd->oobavail -= 9;
this->eccmode = NAND_ECC_HW12_2048;
this->eccsize = 2048;
this->eccbytes += 9;
this->eccsteps = 1;
this->autooob = (fcm->fmr & FMR_ECCM) ?
&fcm_oob_lp_eccm1 : &fcm_oob_lp_eccm0;
memcpy(&mtd->oobinfo, this->autooob,
sizeof(mtd->oobinfo));
}
}
else if(mtd->oobblock == 8192) { //add by asky
lbc->bank[fcm->bank].or |= OR_FCM_PGS;
/* adjust ecc setup if needed */
if ((lbc->bank[fcm->bank].br & BR_DECC) == BR_DECC_CHK_GEN) {
mtd->eccsize = 8192;
mtd->oobavail -= 9;
this->eccmode = NAND_ECC_HW12_2048;
this->eccsize = 8192;
this->eccbytes += 9;
this->eccsteps = 1;
this->autooob = (fcm->fmr & FMR_ECCM) ?
&fcm_oob_lp_eccm1 : &fcm_oob_lp_eccm0;
memcpy(&mtd->oobinfo, this->autooob,
sizeof(mtd->oobinfo));
}
}
else {
printf("fcm_init: page size %d is not supported\n",
mtd->oobblock);
return -1;
}
fcm->pgs = (lbc->bank[fcm->bank].or>>OR_FCM_PGS_SHIFT) & 1;
if (al > 2) {
printf("fcm_init: %d address bytes is not supported\n", al+2);
return -1;
}
/* restore default scan_bbt function and call it */
this->scan_bbt = nand_default_bbt;
return nand_default_bbt(mtd);
}
there must be something wrong with the this->pagemask ,because I print it out with 0xffffffff, but I don't know how to solve it .Can you help me ?
In my memory, FCM of eLBC with e300 could not support 8k page NAND directly.
You have to do much work to support 8k page NAND.
FCM of eLBC with e300: Compatible with small (512 + 16 bytes) and large (2048 + 64 bytes) page parallel NAND FlashEEPROM
thank you! I have changed the NAND! and it works well now。
I had done too much work based on the uboot-1.3.0,so I can not change the uboot nearly.
The old NAND CHIP is 512Byte/page , size : 32MiB
changed with 8192Byte/page ,size : 4GiB
I have no idea now. really need help。