Restarting ADC triggered by PDB

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Restarting ADC triggered by PDB

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michaelhuslig
Contributor IV

This problem has come up before, but I haven't seen a specific answer.  On the TWR40K256, I have the ADC being triggered by the PDB.  But I want to disable the ADC interrupt, do some other processing, and then restart the ADC interrupt.  But I can't get it to restart.  The explanation has something to do with the PDB trigger overflowing or something.  Another way to induce this problem is to have the debugger break the program and then resume.  I have tried various ways of turning the PDB and ADC off and on by software, but still can't get it restarted.  My present workaround, in software, is to turn off CONT in PDB0_SC instead of the ADC interrupt, then to restart it by turning CONT on again along with SWTRIG. Of course this won't restart the ADC if the ADC interrupt is somehow turned off, nor will it work if the debugger is used.  Does any have a specific way to restart the ADC if the PDB overflows?  I would prefer not to have to turn the PDB off since the DACs are still running.

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Hui_Ma
NXP TechSupport
NXP TechSupport

I do a test based on TWR-K40X256 board with Kinetis 100MHz product [adc_demo] project.
I set a counter number at PDB interrupt service routine, when the counter number reach, it will disable PDB counter with below code:
if(pdb_counter == 0x3)
{PDB0_SC &= ~PDB_SC_PDBEN_MASK; }
Then the ADC and related sample could not continue until re-enable the PDB timer.
I use below code to re-enable PDB timer and in previous initialization code, the PDB timer is using software trigger mode:
  PDB0_SC |= PDB_SC_PDBEN_MASK ;
  PDB0_SC |= PDB_SC_SWTRIG_MASK ;    // kick off the PDB  - just once
Then I could get ADC countinue conversion again.
You could download Kinetis 100MHz source code from below link:
KINETIS512_SC  : Kinetis family example projects. 
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=K60_100&nodeId=01624698C9DE2DDDAF&fps...

I also attached my test code for your reference.


Wish it helps.

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michaelhuslig
Contributor IV

I did not want to disable the PDB since the DACs are also being triggered by it.  Turning off the CONT bit in the SC had the effect of stopping further ADC interrupts, but I found that doing so affected the DACs too;  I am not sure why since the PDB documentation is a little vague.  For my current workaround, I am leaving the ADC interrupt enabled and just setting a boolean to tell the interrupt to just dump the data.  This is using a PK40X256VMO100 uP.  I read in the Version 2 docs that going into Debug will now stop the PDB clocks so that ADCs can still run during a debug session.  I hope that the Version 2 uP will also allow the ADC interrupt to be turned on and off at will while using the PDB, just like the DAC interrupt.

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Hui_Ma
NXP TechSupport
NXP TechSupport

I also do a test with ADC interrupt enable bit with ADC Status and Control Registers 1 (ADCx_SC1n) [AIEN], which can disable the ADC interrupt during the code run, while it could not re-enable the ADC interrupt enable again, even if the [AIEN] bit also be set. I will check with ADC IP owner about this issue. I think so far you can use your workaround way to ignore the dummy ADC result with a flag.

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

I am checking with this issue, I will be back when I could get any updated info.
Thank you for the patience.

B.R.
Ma Hui

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