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AXI bus clock scaling on i.MX 6SoloLite

Question asked by Andrea Pretto on Aug 6, 2013
Latest reply on Mar 3, 2014 by Ofer Federovsky

Hi,

 

I've just receiver an i.MX 6SoloLite evaluation board and I've just started to play with it, trying to get power consumption as low as possible.

I'm following the guidelines by Freescale (i.MX 6SoloLite Power Consumption Measurement document) and, apart from disabling unused peripherals, I get the most of the power reduction from scaling the AXI bus clock.


Up to now, in my testing I've scaled AXI and AHB bus clocks changing the PODF in their CCM register using memtool this way, just to try out what happen:

memtool CCM.CBCDR.FABRIC_MMDC_PODF=7

memtool CCM.CBCDR.AHB_PODF=7


Now I'm think of implementing a custom governor that scales that clocks based on our use cases.

By the way what I'm missing here is what are the possible side effects of doing this on the production code, I don't find good documentation on that.

I need to know if there are some stability issues having that clocks so low, or if it's only a matter of performance.


Thanks in advance,

Cheers.



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