AnsweredAssumed Answered

IPU timings calculations for imx53

Question asked by pawel on Aug 1, 2013
Latest reply on Sep 2, 2013 by pawel
Branched to a new discussion

I'm trying to calculate timing paremeters for imx53/51 WinCE 7 BSP. The LCD is DE without HSYNC and VSYNC and has such characteristic:


                            Minimal rating / Typical rating / Maximum rating

Data setup time        6ns / - / -

Data hold time          6ns / - / -

DE setup time          6ns / - / -

CLK freq                  29.40MHz / 33.26MHz / 42.48MHz

CLK period              23.54ns / 30.06ns / 34.01ns

CLK pulse duty        40% / 50% / 60%

DE period               1000 / 1056 / 1200

DE pulse width        - / 800 / -

DE frame blanking   10 / 45 / 110

DE frame width        - / 480 / -


Values needed in Display driver are:

Vertical Sync width (in vertical lines)

Vertical Start Width (in vertical lines)

Vertical End Width (in vertical lines)

Horizontal Sync Width (in pixel clock cyles)

Horizontal Start Width (in pixel clock cyles)

Horizontal End Width (in pixel clock cyles)

Pixel Clock Cycle Frequency: IPU clock 133Mhz

Pixel Data Offset Position

Pixel Clock Up, in ns (if tick is 7.52ns(133Mhz))

Pixel Clock Down, in ns (tick is 7.52ns(133Mhz))


How to calculate those values? I presume that Pixel clock frequency should be 33260000, Pixel data offset position 0, Vertical sync Width and Horizontal Sync Width can be set to 1 as LCD is DE, but how to properly set the rest of the values?