Request A/D Converter Reference Information

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Request A/D Converter Reference Information

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dougplymale
Contributor I

What is the voltage and tolerance of the internal bandgap reference in the Vybrid for the A/D converter?

What is the current draw by VREFH_ADC?

Could you double check the minimum voltage for VREFH_ADC. 3V seems a little high especially when looking at reference voltages to be run off of the 3.3V rail. I would like to run a 3.0V reference.

FSL SR# 1-1124328476 : A/D reference information

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naoumgitnik
Senior Contributor V

Dear Doug,

Provided below is information requested; ideally, it should be corrected in the next Datasheet revision.

Current drawn by VREFH_ADC pin:

  • About 1mA with 2mA peaks, due to which the VREFH_ADC path resistance should be kept low (to not slow ADC operation down).


Voltage Range for Vybrid ADC:

  • VDDA between 2.5V and 3.6V,
  • VREFH between 2.5V and VDDA.

Confidential information might be provided via a local Freescale FAE, usually with signing an NDA.

Sincerely, Naoum Gitnik.

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naoumgitnik
Senior Contributor V

Dear Doug,

The data requested might be confidential but regardless of that I am having difficulties understanding why you are being confused with running with the VREFH_ADC voltage value within the range provided in the Datasheet. May you clarify that, please?

Sincerely, Naoum Gitnik.


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dougplymale
Contributor I

Naoum Gitnik,

The VREFH_ADC voltage value has a range of 3V to 3.6V from 8.3 Recommended operating conditions, Table 30 pg 33 of VF6xx....Data Sheet, Rev 5, 05/2013.  I want to run a 3V reference vs. a 3.3V reference because my rail is sitting
between 3.168-3.432V (+/-4%). I need around 0.1V above the reference in order to regulate the reference (or more based on current draw of VREFH_ADC, which is confidential??). This presents a potential problem because the low values of
the reference will be minutely under the 3V minimum specification.

I guess I could run a separate 5V rail and sequence it to the 3.3V rail to run the 3.3V reference. However, then I need to worry about power sequencing in table 29. It also adds additional cost in the rail and sequencing circuits.  If I wanted to do this I would have used a TI processor.

Because I am planning to be on the very edge of the requirement I would like to know how much of a risk this is or if it is possible in this case to go safely below 3V to some degree. It seems to me that most installations would be similar to mine. Please let me know the alternatives if I am missing something.

As far as the voltage and tolerance of the internal bandgap reference, there is not any information in the data sheet or reference manual specifying the accuracy, temperature drift and voltage. I would like to see the specs. If you wanted to keep this information confidential then don't ask me to post my question on a public form after I submit it into your service request system.

Thanks,

Doug

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naoumgitnik
Senior Contributor V

Dear Doug,

Provided below is information requested; ideally, it should be corrected in the next Datasheet revision.

Current drawn by VREFH_ADC pin:

  • About 1mA with 2mA peaks, due to which the VREFH_ADC path resistance should be kept low (to not slow ADC operation down).


Voltage Range for Vybrid ADC:

  • VDDA between 2.5V and 3.6V,
  • VREFH between 2.5V and VDDA.

Confidential information might be provided via a local Freescale FAE, usually with signing an NDA.

Sincerely, Naoum Gitnik.

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naoumgitnik
Senior Contributor V

Dear Doug,


I received the Vybrid bandgap accuracy and temperature drift information for you.


May you, please, contact your local Freescale FAE and ask him/her to post a request for it of the Vybrid FAE Comminity forum, please?

To expedite the process, it makes sense to notify me directly about this request without waiting until the dispatcher assigns it to me.


Sincerely, Naoum Gitnik.

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dougplymale
Contributor I

Thank you Naoum Gitnik.

I will follow up through my Freescale FAE for the remaining information.

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