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Problems getting the K10 EEPROM flex ram working

Question asked by julian morrison on Jul 26, 2013
Latest reply on Aug 27, 2014 by julian morrison

Hello,
I am having no luck in getting the K10 EEPROM flex ram working.
The device is marked as M10AFV IN86B bought from Farnell and has been confirmed as a K10DX64 part.
I want to use all of Flex NVM for 2k of EEPROM.
No matter how I setup the the EEE_SIZE and DFLASH_SIZE the SIM_FCFG1 register always reports:
NVMSIZE = 3 (32k)
PFSIZE = 5 (64k)
EESIZE = 3 (2k)
DEPART = 0x0B (32k) - ie no EEPROM)
My code hangs waiting for EEERDY in FTFL_FCNFG

I am running Codewarrior 10.4 using a barebones project on the target K10 board and also tried this code on the K20DX part on the tower development kit.
Its looks like the partition and size have already been set and cannot be changed even after erasing the device with programmer and executing Erase all blocks command.
The partition command always reports ACCERR no matter what I do.
Is there any way to erase Data Flash IFR?

Is there anything I am doing wrong here?

 

Cheers

 

Here is a code snipet…..

 

#define EEE_SIZE_32    (0x39)

#define EEE_SIZE_64    (0x38)

#define EEE_SIZE_128   (0x37)

#define EEE_SIZE_256   (0x36)

#define EEE_SIZE_512   (0x35)

#define EEE_SIZE_1K    (0x34)

#define EEE_SIZE_2K    (0x33)

#define EEE_SIZE       EEE_SIZE_2K

 

#define DFLASH_SIZE_0  (0x08)

#define DFLASH_SIZE_8  (0x09)

#define DFLASH_SIZE_16 (0x0A)

#define DFLASH_SIZE_32 (0x0B)

#define DFLASH_SIZE    DFLASH_SIZE_0

 

 

int main(void)

{

   byte  accessError;

   byte  violationError;

   byte  readCollisionError;

   byte  commandComplete;

  

   byte   eeeReady = (FTFL_FCNFG & FTFL_FCNFG_EEERDY_MASK) ? 1 : 0;

   byte   ramReady = (FTFL_FCNFG & FTFL_FCNFG_RAMRDY_MASK) ? 1 : 0;

   dword  nvmSize = (SIM_FCFG1 & SIM_FCFG1_NVMSIZE_MASK) >> SIM_FCFG1_NVMSIZE_SHIFT;

   dword  pfSize  = (SIM_FCFG1 & SIM_FCFG1_PFSIZE_MASK) >> SIM_FCFG1_PFSIZE_SHIFT;

   dword  eeSize  = (SIM_FCFG1 & SIM_FCFG1_EESIZE_MASK) >> SIM_FCFG1_EESIZE_SHIFT;

   dword  depart  = (SIM_FCFG1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT;

  

   SIM_SCGC6 |= SIM_SCGC6_FTFL_MASK;                      // ensure flash memory clock is enabled

  

   // test if flash has be configured

   if (depart != DFLASH_SIZE)

   {

      // test and clear any errors

      if (FTFL_FSTAT & (FTFL_FSTAT_ACCERR_MASK | FTFL_FSTAT_FPVIOL_MASK))

      {

         FTFL_FSTAT = (FTFL_FSTAT_ACCERR_MASK | FTFL_FSTAT_FPVIOL_MASK);

      }

     

      // set EEPROM partition and size

      FTFL_FCCOB0 = FTFL_FCCOB0_CCOBn(0x80);                 // PMGPART - program partition function command

      FTFL_FCCOB1 = 0;                                       // not used

      FTFL_FCCOB2 = 0;                                       // not used

      FTFL_FCCOB3 = 0;                                       // not used

      FTFL_FCCOB4 = EEE_SIZE;                                // EEPROM - size code

      FTFL_FCCOB5 = DFLASH_SIZE;                             // DEPART - partition code

      FTFL_FSTAT = FTFL_FSTAT_CCIF_MASK;                     // launch command

      while(!(FTFL_FSTAT & FTFL_FSTAT_CCIF_MASK));           // wait for command to complete   

     

      accessError        = (FTFL_FSTAT & FTFL_FSTAT_ACCERR_MASK) ? 1 : 0;

      violationError     = (FTFL_FSTAT & FTFL_FSTAT_FPVIOL_MASK) ? 1 : 0;

      readCollisionError = (FTFL_FSTAT & FTFL_FSTAT_RDCOLERR_MASK) ? 1 : 0;

      commandComplete    = (FTFL_FSTAT & FTFL_FSTAT_MGSTAT0_MASK) ? 1 : 0;     

 

      // set flex ram as EEPROM

      FTFL_FCCOB0 = FTFL_FCCOB0_CCOBn(0x81);                 // SETRAM - set FlexRAM function command

      FTFL_FCCOB1 = 0x00;                                    // make FlexRAM available for EEPROM command

      FTFL_FSTAT = FTFL_FSTAT_CCIF_MASK;                     // launch command

      while(!(FTFL_FSTAT & FTFL_FSTAT_CCIF_MASK));           // wait for command to complete      

 

      accessError        = (FTFL_FSTAT & FTFL_FSTAT_ACCERR_MASK) ? 1 : 0;

      violationError     = (FTFL_FSTAT & FTFL_FSTAT_FPVIOL_MASK) ? 1 : 0;

      readCollisionError = (FTFL_FSTAT & FTFL_FSTAT_RDCOLERR_MASK) ? 1 : 0;

      commandComplete    = (FTFL_FSTAT & FTFL_FSTAT_MGSTAT0_MASK) ? 1 : 0;

}

  

   while(!(FTFL_FCNFG & FTFL_FCNFG_EEERDY_MASK));         // wait for EEPROM ready

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