Hello,
ich have ported a MQX-Project from freescale compiler to gcc. After a lot of work I'm nearly finished. But now I have Problems with the linkerfile given from freescale.
Original file (.ld):
/*
*****************************************************************************
**
** File : K60DN512Z_flash.ld
**
** Default linker command file for Flash targets
**
*****************************************************************************
*/
/* Entry Point */
ENTRY(__thumb_startup)
/* Highest address of the user mode stack */
_estack = 0x20000000; /* end of lower SRAM */
__SP_INIT = _estack;
/* Generate a link error if heap and stack don't fit into RAM */
__heap_size = 0x800; /* required amount of heap */
__stack_size = 0x800; /* required amount of stack */
/* Specify the memory areas */
MEMORY
{
m_interrupts (rx) : ORIGIN = 0x00000000, LENGTH = 0x1E0
m_cfmprotrom (rx) : ORIGIN = 0x00000400, LENGTH = 0x10
m_text (rx) : ORIGIN = 0x00000800, LENGTH = 512K - 0x800
m_data (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 64K /* Lower SRAM */
m_data2 (rwx) : ORIGIN = 0x20000000, LENGTH = 64K /* Upper SRAM */
}
/* Define output sections */
SECTIONS
{
/* The startup code goes first into Flash */
.interrupts :
{
__vector_table = .;
. = ALIGN(4);
KEEP(*(.vectortable)) /* Startup code */
. = ALIGN(4);
} > m_interrupts
.cfmprotect :
{
. = ALIGN(4);
KEEP(*(.cfmconfig)) /* Flash Configuration Field (FCF) */
. = ALIGN(4);
} > m_cfmprotrom
/* The program code and other data goes into Flash */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} > m_text
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > m_text
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > m_text
.ctors :
{
__CTOR_LIST__ = .;
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
/* We don't want to include the .ctor section from
from the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
} > m_text
.dtors :
{
__DTOR_LIST__ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
} > m_text
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > m_text
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} > m_text
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
___ROM_AT = .;
} > m_text
/* Initialized data sections goes into RAM, load LMA copy after code */
.data : AT(___ROM_AT)
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */
} > m_data
___data_size = _edata - _sdata;
___m_data2_ROMStart = ___ROM_AT + SIZEOF(.data);
.user_data2 : AT(___m_data2_ROMStart)
{
. = ALIGN(4);
___m_data2_RAMStart = .;
*(.data2) /* This is an User defined section */
___m_data2_RAMEnd = .;
. = ALIGN(4);
} > m_data2
___m_data2_ROMSize = ___m_data2_RAMEnd - ___m_data2_RAMStart;
/* Uninitialized data section */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
__START_BSS = .;
PROVIDE ( __bss_start__ = __START_BSS );
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__END_BSS = .;
PROVIDE ( __bss_end__ = __END_BSS );
} > m_data
/* User_heap_stack section, used to check that there is enough RAM left */
._user_heap_stack :
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
__heap_addr = .;
. = . + __heap_size;
. = . + __stack_size;
. = ALIGN(4);
} > m_data
_romp_at = ___ROM_AT + SIZEOF(.data) + SIZEOF(.user_data2);
.romp : AT(_romp_at)
{
__S_romp = _romp_at;
LONG(___ROM_AT);
LONG(_sdata);
LONG(___data_size);
LONG(___m_data2_ROMStart);
LONG(___m_data2_RAMStart);
LONG(___m_data2_ROMSize);
LONG(0);
LONG(0);
LONG(0);
} > m_data2
.ARM.attributes 0 : { *(.ARM.attributes) }
}
And if I compare the freescale compiler linker file (.lcf) I see that there are a lot of symbols needed by MQX:
MEMORY
{
vectorrom (RX): ORIGIN = 0x00000000, LENGTH = 0x00000400
cfmprotrom (R): ORIGIN = 0x00000400, LENGTH = 0x00000020
rom (RX): ORIGIN = 0x00000420, LENGTH = 0x0007FBE0 # Code + Const data
ram (RW): ORIGIN = 0x1FFF0000, LENGTH = 0x00020000 # SRAM - RW data
# kernel space starts after RAM variables (Location of MQX Kernel data + MQX heap)
end_of_kd (RW): ORIGIN = 0x2000FFF0, LENGTH = 0x00000000
# Boot stack reused by MQX Kernel data
bstack (RW): ORIGIN = 0x2000FA00, LENGTH = 0x00000200 # Boot stack
end_bstack (RW): ORIGIN = 0x2000FC00, LENGTH = 0x00000000
}
KEEP_SECTION { .vectors_rom, .vectors_ram, .cfmconfig }
SECTIONS
{
__INTERNAL_SRAM_BASE = 0x1FFF0000;
__INTERNAL_SRAM_SIZE = 0x00020000;
__INTERNAL_FLASH_BASE = 0x00000000;
__INTERNAL_FLASH_SIZE = 0x00080000;
__INTERNAL_FLEXNVM_BASE = 0;
__INTERNAL_FLEXNVM_SIZE = 0;
__EXTERNAL_MRAM_BASE = 0x70000000;
__EXTERNAL_MRAM_SIZE = 0x00080000;
__EXTERNAL_MRAM_ROM_BASE = 0x70000000;
__EXTERNAL_MRAM_ROM_SIZE = 0x00000000;
__EXTERNAL_MRAM_RAM_BASE = 0x70000000;
__EXTERNAL_MRAM_RAM_SIZE = 0x00080000;
__EXTERNAL_LCD_BASE = 0x60000000;
__EXTERNAL_LCD_SIZE = 0x1FFFF;
__EXTERNAL_LCD_DC_BASE = 0x60010000;
# MQX link time configurations
__DEFAULT_PROCESSOR_NUMBER = 1;
__DEFAULT_INTERRUPT_STACK_SIZE = 1024;
__KERNEL_DATA_VERIFY_ENABLE = 0; # Test SDRAM read/write
# Flashx configurations
__FLASHX_SECT_SIZE = 0x800;
.vectors :
{
__VECTOR_TABLE_ROM_START = .; # Runtime vector table in sram
*(.vectors_rom)
. = ALIGN (0x4);
} > vectorrom
.cfmprotect :
{
*(.cfmconfig)
. = ALIGN (0x4);
} > cfmprotrom
.main_application :
{
*(KERNEL)
*(S_BOOT)
*(IPSUM)
*(.text)
*(.init)
*(.fini)
*(.eini)
*(.ctors)
*(.dtors)
. = ALIGN(0x4);
*(.rodata)
. = ALIGN(0x4);
*(.rdata)
. = ALIGN(0x4);
*(.ARM.extab)
. = ALIGN(0x4);
*(.exception)
. = ALIGN(0x4);
__exception_table_start__ = .;
EXCEPTION
__exception_table_end__ = .;
__sinit__ = .;
STATICINIT
. = ALIGN(0x4);
__COPY_OF_DATA = .;
} > rom
.main_application_data : AT(__COPY_OF_DATA)
{
. = ALIGN(128);
__VECTOR_TABLE_RAM_START = .; # Runtime vector table in sram
*(.vectors_ram)
. = ALIGN(512);
__BDT_BASE = .;
*(.usb_bdt)
__BDT_END = .;
. = ALIGN(0x20);
__USER_NO_MEMORY_START = .;
*(.nouser)
__USER_NO_MEMORY_END = .;
. = ALIGN(0x20);
__USER_RO_MEMORY_START = .;
*(.rouser)
__USER_RO_MEMORY_END = .;
. = ALIGN(0x20);
__USER_RW_MEMORY_START = .;
*(.rwuser)
__USER_RW_MEMORY_END = .;
. = ALIGN(0x20);
__USER_DEFAULT_MEMORY_START = .;
__START_DATA = .;
*(.data)
__END_DATA = .;
. = ALIGN(0x10);
__START_SDATA = .;
*(.sdata)
__END_SDATA = .;
. = ALIGN(0x10);
__SDA_BASE = .;
__SDA_BASE_ = __SDA_BASE;
. = ALIGN(0x20);
*(.kernel_data)
# jlink-flasher workaround: keep the next main_application_bss section aligned
# so the BSS does not generate RAM section in ELF which then confuses jlink
. = ALIGN(0x10);
} > ram
.main_application_bss :
{
. = ALIGN(0x10);
__START_SBSS = .;
*(.sbss)
*(SCOMMON)
__END_SBSS = .;
__START_BSS = .;
*(.bss)
*(COMMON)
__END_BSS = .;
. = ALIGN(0x20);
__USER_DEFAULT_MEMORY_END = .;
. = ALIGN(0x10);
} >> ram
.kernel_data : #AT(ADDR(.main_application_bss) + SIZEOF(.main_application_bss))
{
__KERNEL_DATA_START = ALIGN(0x10);
}
.end_of_kernel_data :
{
__KERNEL_DATA_END = .;
} > end_of_kd
.boot_stack :
{
_stack_end = .;
} > bstack
.end_of_boot_stack :
{
_stack_addr = .;
__SP_INIT = .;
__BOOT_STACK_ADDRESS = .;
} > end_bstack
# Locate the ROM copy table into ROM after the initialized data
_romp_at = __COPY_OF_DATA + SIZEOF(.main_application_data);
.romp : AT (_romp_at)
{
__S_romp = _romp_at;
WRITEW(__COPY_OF_DATA); #ROM start address
WRITEW(ADDR(.main_application_data)); #RAM start address
WRITEW(SIZEOF(.main_application_data)); #size
WRITEW(0);
WRITEW(0);
WRITEW(0);
}
_flashx_start = __COPY_OF_DATA + SIZEOF(.main_application_data) + SIZEOF(.romp);
# flashx working area spans across the whole rest of Flash memory
__FLASHX_START_ADDR = ((_flashx_start + __FLASHX_SECT_SIZE - 1) / __FLASHX_SECT_SIZE) * __FLASHX_SECT_SIZE;
__FLASHX_END_ADDR = __INTERNAL_FLASH_BASE + __INTERNAL_FLASH_SIZE;
}
Does anyone has a valid linkerfile for gcc containing all neccesary symbols like __KERNEL_DATA_START, __KERNEL_DATA_END, __VECTOR_TABLE_ROM_START and so on...
Thanks and best regards,
Tobias
Hi, this is Yong, could you please upload a screen-shot of your problem for investigating?
OK,
I found a porting guide from a lcf-file to a ld-file. It's placed in
"C:\Freescale\CW MCU v10.4\MCU\Help\PDF\Porting_ARM_GCC.pdf"
After that I've got the following ld-linkerfile:
MEMORY
{
vectorrom (RX): ORIGIN = 0x00000000, LENGTH = 0x00000400
cfmprotrom (R): ORIGIN = 0x00000400, LENGTH = 0x00000020
rom (RX): ORIGIN = 0x00000420, LENGTH = 0x0007FBE0
ram (RW): ORIGIN = 0x1FFF0000, LENGTH = 0x00020000
end_of_kd (RW): ORIGIN = 0x2000FFF0, LENGTH = 0x00000000
bstack (RW): ORIGIN = 0x2000FA00, LENGTH = 0x00000200
end_bstack (RW): ORIGIN = 0x2000FC00, LENGTH = 0x00000000
}
SECTIONS
{
__INTERNAL_SRAM_BASE = 0x1FFF0000;
__INTERNAL_SRAM_SIZE = 0x00020000;
__INTERNAL_FLASH_BASE = 0x00000000;
__INTERNAL_FLASH_SIZE = 0x00080000;
__INTERNAL_FLEXNVM_BASE = 0;
__INTERNAL_FLEXNVM_SIZE = 0;
__EXTERNAL_MRAM_BASE = 0x70000000;
__EXTERNAL_MRAM_SIZE = 0x00080000;
__EXTERNAL_MRAM_ROM_BASE = 0x70000000;
__EXTERNAL_MRAM_ROM_SIZE = 0x00000000;
__EXTERNAL_MRAM_RAM_BASE = 0x70000000;
__EXTERNAL_MRAM_RAM_SIZE = 0x00080000;
__EXTERNAL_LCD_BASE = 0x60000000;
__EXTERNAL_LCD_SIZE = 0x1FFFF;
__EXTERNAL_LCD_DC_BASE = 0x60010000;
__DEFAULT_PROCESSOR_NUMBER = 1;
__DEFAULT_INTERRUPT_STACK_SIZE = 1024;
__KERNEL_DATA_VERIFY_ENABLE = 0;
__FLASHX_SECT_SIZE = 0x800;
.vectors :
{
__VECTOR_TABLE_ROM_START = .;
KEEP(*(.vectors_rom))
. = ALIGN (0x4);
} > vectorrom
.cfmprotect :
{
KEEP(*(.cfmconfig))
. = ALIGN (0x4);
} > cfmprotrom
.main_application :
{
*(KERNEL)
*(S_BOOT)
*(IPSUM)
*(.text)
*(.text*)
*(.init)
*(.fini)
*(.eini)
*(.ctors)
*(.dtors)
. = ALIGN(0x4);
*(.rodata)
*(.rodata*)
. = ALIGN(0x4);
*(.rdata)
. = ALIGN(0x4);
} > rom
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > rom
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > rom
.ctors :
{
__CTOR_LIST__ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
} > rom
.dtors :
{
__DTOR_LIST__ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
} > rom
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > rom
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} > rom
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
___ROM_AT = .;
__COPY_OF_DATA = .;
} > rom
.main_application_data : AT(__COPY_OF_DATA)
{
. = ALIGN(128);
__VECTOR_TABLE_RAM_START = .;
KEEP(*(.vectors_ram))
. = ALIGN(512);
__BDT_BASE = .;
*(.usb_bdt)
__BDT_END = .;
. = ALIGN(0x20);
__USER_NO_MEMORY_START = .;
*(.nouser)
__USER_NO_MEMORY_END = .;
. = ALIGN(0x20);
__USER_RO_MEMORY_START = .;
*(.rouser)
__USER_RO_MEMORY_END = .;
. = ALIGN(0x20);
__USER_RW_MEMORY_START = .;
*(.rwuser)
__USER_RW_MEMORY_END = .;
. = ALIGN(0x20);
__USER_DEFAULT_MEMORY_START = .;
__START_DATA = .;
*(.data)
__END_DATA = .;
. = ALIGN(0x10);
__START_SDATA = .;
*(.sdata)
__END_SDATA = .;
. = ALIGN(0x10);
__SDA_BASE = .;
__SDA_BASE_ = __SDA_BASE;
. = ALIGN(0x20);
*(.kernel_data)
. = ALIGN(0x10);
} > ram
.main_application_bss :
{
. = ALIGN(0x10);
__START_SBSS = .;
*(.sbss)
*(SCOMMON)
__END_SBSS = .;
__START_BSS = .;
*(.bss)
*(COMMON)
__END_BSS = .;
. = ALIGN(0x20);
__USER_DEFAULT_MEMORY_END = .;
. = ALIGN(0x10);
} > ram
.kernel_data :
{
__KERNEL_DATA_START = ALIGN(0x10);
}
.end_of_kernel_data :
{
__KERNEL_DATA_END = .;
} > end_of_kd
.boot_stack :
{
_stack_end = .;
} > bstack
.end_of_boot_stack :
{
_stack_addr = .;
__SP_INIT = .;
__BOOT_STACK_ADDRESS = .;
} > end_bstack
_romp_at = __COPY_OF_DATA + SIZEOF(.main_application_data);
.romp : AT (_romp_at)
{
__S_romp = _romp_at;
LONG(__COPY_OF_DATA);
LONG(ADDR(.main_application_data));
LONG(SIZEOF(.main_application_data));
LONG(0);
LONG(0);
LONG(0);
}
.ARM.attributes 0 : { *(.ARM.attributes) }
_flashx_start = __COPY_OF_DATA + SIZEOF(.main_application_data) + SIZEOF(.romp);
__FLASHX_START_ADDR = ((_flashx_start + __FLASHX_SECT_SIZE - 1) / __FLASHX_SECT_SIZE) * __FLASHX_SECT_SIZE;
__FLASHX_END_ADDR = __INTERNAL_FLASH_BASE + __INTERNAL_FLASH_SIZE;
}
OK, so far so good. But now I have the feeling that the Kernel will not be included in the elf file. There must be more differences between the linker file.
I will continue searching for a solution. Maybe someone has an idear for me.
Thanks
Tobias
I was wrong the kernel is includes but the vector_table is missing:
PICTest_gcc.elf :
section size addr
.cfmprotect 0x10 0x400
.main_application 0x584bc 0x420
.ARM.extab 0x114 0x588dc
.data._ZL4True 0xf 0x589f0
.data.MQX_template_list 0x60 0x1fff0000
.data._mqx_kernel_data 0x4 0x1fff0060
.data._ZN7devices4Uart17ms_aszDeviceNamesE 0x18 0x1fff0064
.data._ZN7devices4Uart14ms_aszPinListsE 0x18 0x1fff007c
.data._ZN7devices4Uart13ms_aszCTSPinsE 0x18 0x1fff0094
.data._ZN7devices4Uart24ms_aun32DefaultBaudRatesE 0x18 0x1fff00ac
.data._ZN7devices4Uart16ms_aszUartEventsE 0x18 0x1fff00c4
.data._ZN6events5Event14ms_un32TimeOutE 0x4 0x1fff00dc
.data._ZN7devices8Ethernet14ms_tMACAddressE 0x8 0x1fff00e0
.data._ZN9transfers3DMA17ms_ptDMARegistersE 0x4 0x1fff00e8
.data._ZN9transfers3DMA20ms_ptDMAMUXRegistersE 0x4 0x1fff00ec
.data._ZN7devices7STC310010ms_un8ModeE 0x1 0x1fff00f0
.data._ZN7devices7STC310015ms_fTemperatureE 0x4 0x1fff00f4
.data._ZN7devices8__SPIBus18ms_aptSPIRegistersE 0xc 0x1fff00f8
.data._ZN7devices8__SPIBus27ms_aun32SPITransmitTriggersE 0xc 0x1fff0104
.data._ZN7devices8__SPIBus26ms_aun32SPIReceiveTriggersE 0xc 0x1fff0110
.data._ZN7devices6I2CBus14ms_un32RetriesE 0x4 0x1fff011c
.data._ZN9transfers12DataTransfer14ms_un32TimeOutE 0x4 0x1fff0120
.data._MFS_handle_pool_init 0x4 0x1fff0124
.data._MFS_handle_pool_grow 0x4 0x1fff0128
.data._RTCSQUEUE_base 0x4 0x1fff012c
.data._RTCSPCB_init 0x4 0x1fff0130
.data._RTCSPCB_max 0x4 0x1fff0134
.data._RTCSTASK_priority 0x4 0x1fff0138
.data._RTCSTASK_stacksize 0x4 0x1fff013c
.data._UDP_max_queue_size 0x4 0x1fff0140
.data._RTCS_msgpool_init 0x4 0x1fff0144
.data._RTCS_msgpool_grow 0x4 0x1fff0148
.data._RTCS_msgpool_max 0x4 0x1fff014c
.data._RTCS_socket_part_init 0x4 0x1fff0150
.data._RTCS_socket_part_grow 0x4 0x1fff0154
.data._RTCS_socket_part_max 0x4 0x1fff0158
.data._RTCS_dhcp_term_timeout 0x4 0x1fff015c
.data.DNS_M_Root_server 0x24 0x1fff0160
.data.DNS_L_Root_server 0x24 0x1fff0184
.data.DNS_K_Root_server 0x24 0x1fff01a8
.data.DNS_J_Root_server 0x24 0x1fff01cc
.data.DNS_I_Root_server 0x24 0x1fff01f0
.data.DNS_H_Root_server 0x24 0x1fff0214
.data.DNS_G_Root_server 0x24 0x1fff0238
.data.DNS_F_Root_server 0x24 0x1fff025c
.data.DNS_E_Root_server 0x24 0x1fff0280
.data.DNS_D_Root_server 0x24 0x1fff02a4
.data.DNS_C_Root_server 0x24 0x1fff02c8
.data.DNS_B_Root_server 0x24 0x1fff02ec
.data.DNS_A_Root_server 0x24 0x1fff0310
.data.DNS_Local_server_name 0xc 0x1fff0334
.data.DNS_Local_server_list 0x24 0x1fff0340
.data.DNS_First_Local_server 0x4 0x1fff0364
.data.state 0x4 0x1fff0368
.data._ZN10__cxxabiv120__unexpected_handlerE 0x4 0x1fff036c
.data._ZN10__cxxabiv119__terminate_handlerE 0x4 0x1fff0370
.data.__files 0xcc 0x1fff0374
.ARM 0x1f0 0x58a00
.init_array 0x48 0x58bf0
.main_application_data 0x1c0 0x1fff0440
.main_application_bss 0x100 0x1fff0600
.bss._ZL12s_cszNumbers 0xd8 0x1fff0700
.bss.heuristic.7053 0x4 0x1fff07d8
.bss.ms_per_tick.7052 0x4 0x1fff07dc
.bss.PE_LDD_DeviceDataList 0xc 0x1fff07e0
.bss.alarm_time 0x4 0x1fff07ec
.bss.sw_time 0x4 0x1fff07f0
.bss.user_enables 0x4 0x1fff07f4
.bss.user_requests 0x4 0x1fff07f8
.bss.user_isr 0x4 0x1fff07fc
.bss._ZN7devices4Uart16ms_aptSemaphoresE 0x18 0x1fff0800
.bss._ZN7devices4Uart15ms_aptInstancesE 0x18 0x1fff0818
.bss._ZL5False 0xd 0x1fff0830
.bss._ZN7devices6SDCard13ms_ptInstanceE 0x4 0x1fff0840
.bss._ZN7devices6SDCard15ms_bInitializedE 0x1 0x1fff0844
.bss._ZGVZN7devices17__isrPortsAndPinsEPvE5pPort 0x4 0x1fff0848
.bss._ZN7devices11SystemPorts13ms_ptInstanceE 0x4 0x1fff084c
.bss._ZZN7devices17__isrPortsAndPinsEPvE5pPort 0x4 0x1fff0850
.bss._ZN7devices3Pin14ms_szNoPinNameE 0xc 0x1fff0854
.bss._ZN7devices3Pin14ms_tInvalidPinE 0x24 0x1fff0860
.bss._ZN7devices10SystemPins13ms_ptInstanceE 0x4 0x1fff0884
.bss._ZN7devices7PinList12ms_szAllPinsE 0xc 0x1fff0888
.bss._ZN7devices7PinList12ms_szAnyPinsE 0xc 0x1fff0894
.bss._ZN7devices14SystemPinLists11m_tInstanceE 0x4 0x1fff08a0
.bss._ZN7devices11SystemGPIOs11m_tInstanceE 0x4 0x1fff08a4
.bss._ZN6events12SystemEvents13ms_ptInstanceE 0x4 0x1fff08a8
.bss._ZN7devices8Ethernet13ms_ptInstanceE 0x4 0x1fff08ac
.bss._ZN7devices8Ethernet17ms_un32EnetDeviceE 0x4 0x1fff08b0
.bss._ZN7devices11DetectorPIC13ms_ptInstanceE 0x4 0x1fff08b4
.bss._ZN7devices11DetectorPIC15ms_bInitializedE 0x1 0x1fff08b8
.bss._ZN9transfers3DMA13ms_ptInstanceE 0x4 0x1fff08bc
.bss._ZN7devices7STC310012ms_tUniqueIdE 0x8 0x1fff08c0
.bss._ZN7devices7STC310010ms_fChargeE 0x4 0x1fff08c8
.bss._ZN7devices7STC310014ms_un32CounterE 0x4 0x1fff08cc
.bss._ZN7devices7STC310011ms_fCurrentE 0x4 0x1fff08d0
.bss._ZN7devices7STC310011ms_fVoltageE 0x4 0x1fff08d4
.bss._ZN7devices8__SPIBus18ms_aszPinListNamesE 0x24 0x1fff08d8
.bss._ZN7devices6I2CBus15ms_aptInstancesE 0x8 0x1fff08fc
.bss._ZN7devices6I2CBus16ms_aptSemaphoresE 0x8 0x1fff0904
.bss._ZN9transfers11DMATransfer8ms_ptDMAE 0x4 0x1fff090c
.bss._MFS_handle_pool_max 0x4 0x1fff0910
.bss._RTCSPCB_grow 0x4 0x1fff0914
.bss._RTCS_initialized 0x4 0x1fff0918
.bss._IP_forward 0x4 0x1fff091c
.bss._TCP_bypass_rx 0x4 0x1fff0920
.bss._TCP_bypass_tx 0x4 0x1fff0924
.bss._DHCP_broadcast 0x4 0x1fff0928
.bss._RTCS_mem_pool 0x4 0x1fff092c
.bss.ipcfg_data 0x80 0x1fff0930
.bss.DNS_CACHE_NAME_LIMIT 0x4 0x1fff09b0
.bss.RTCS_IF_LOCALHOST_PRV 0x4 0x1fff09b4
.bss.IF_FREE 0x4 0x1fff09b8
.bss.best_ptr.10167 0x4 0x1fff09bc
.bss.last_time.10169 0x4 0x1fff09c0
.bss.current_query_id.10108 0x2 0x1fff09c4
.bss.seed 0x4 0x1fff09c8
.bss.reseed 0x4 0x1fff09cc
.bss._opened_fs_table 0x30 0x1fff09d0
.bss.__dso_handle 0x4 0x1fff0a00
.bss.atexit_curr_func 0x4 0x1fff0a04
.bss.atexit_funcs 0x300 0x1fff0a08
.bss.__global_destructor_chain 0x4 0x1fff0d08
.bss._ZSt13__new_handler 0x4 0x1fff0d0c
.bss._ZL14emergency_used 0x4 0x1fff0d10
.bss._ZL16emergency_buffer 0x800 0x1fff0d18
.bss._ZL10eh_globals 0xc 0x1fff1518
.bss.__stdio_exit 0x4 0x1fff1524
.bss.__console_exit 0x4 0x1fff1528
.bss.argv 0x4 0x1fff152c
.bss.__S_romp 0xc 0x1fff1530
.romp 0x18 0x1fff153c
.ARM.attributes 0x37 0x0
.debug_info 0x115771 0x0
.debug_abbrev 0x196f2 0x0
.debug_loc 0x32fe8 0x0
.debug_aranges 0x8a68 0x0
.debug_line 0xb0cd7 0x0
.debug_str 0x77c07 0x0
.comment 0x79 0x0
.debug_frame 0x1df4c 0x0
.debug_macinfo 0x65f22e4 0x0
Total 0x68fd1da
The vector_table shoud be at position 0x0 with length of 0x400.
My actual linker file:
ENTRY(__thumb_startup)
MEMORY
{
vectorrom (rx): ORIGIN = 0x00000000, LENGTH = 0x00000400
cfmprotrom (rx): ORIGIN = 0x00000400, LENGTH = 0x00000020
rom (rx): ORIGIN = 0x00000420, LENGTH = 0x0007FBE0
ram (rwx): ORIGIN = 0x1FFF0000, LENGTH = 0x00020000
end_of_kd (rw): ORIGIN = 0x2000FFF0, LENGTH = 0x00000000
bstack (rw): ORIGIN = 0x2000FA00, LENGTH = 0x00000200
end_bstack (rw): ORIGIN = 0x2000FC00, LENGTH = 0x00000000
}
SECTIONS
{
__INTERNAL_SRAM_BASE = 0x1FFF0000;
__INTERNAL_SRAM_SIZE = 0x00020000;
__INTERNAL_FLASH_BASE = 0x00000000;
__INTERNAL_FLASH_SIZE = 0x00080000;
__INTERNAL_FLEXNVM_BASE = 0;
__INTERNAL_FLEXNVM_SIZE = 0;
__EXTERNAL_MRAM_BASE = 0x70000000;
__EXTERNAL_MRAM_SIZE = 0x00080000;
__EXTERNAL_MRAM_ROM_BASE = 0x70000000;
__EXTERNAL_MRAM_ROM_SIZE = 0x00000000;
__EXTERNAL_MRAM_RAM_BASE = 0x70000000;
__EXTERNAL_MRAM_RAM_SIZE = 0x00080000;
__DEFAULT_PROCESSOR_NUMBER = 1;
__DEFAULT_INTERRUPT_STACK_SIZE = 1024;
__KERNEL_DATA_VERIFY_ENABLE = 0;
__FLASHX_SECT_SIZE = 0x800;
.vectors :
{
__VECTOR_TABLE_ROM_START = .;
. = ALIGN (0x4);
KEEP( * (vectors_rom))
. = ALIGN (0x4);
} > vectorrom
.cfmprotect :
{
KEEP(*(.cfmconfig))
. = ALIGN (0x4);
} > cfmprotrom
.main_application :
{
*(KERNEL)
*(S_BOOT)
*(IPSUM)
*(.text)
*(.text*)
*(.init)
*(.fini)
*(.eini)
*(.ctors)
*(.dtors)
. = ALIGN(0x4);
*(.rodata)
*(.rodata*)
. = ALIGN(0x4);
*(.rdata)
. = ALIGN(0x4);
} > rom
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } > rom
.ARM : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > rom
.ctors :
{
__CTOR_LIST__ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
} > rom
.dtors :
{
__DTOR_LIST__ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
__DTOR_END__ = .;
} > rom
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} > rom
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} > rom
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
___ROM_AT = .;
__COPY_OF_DATA = .;
} > rom
.main_application_data : AT(__COPY_OF_DATA)
{
. = ALIGN(128);
__VECTOR_TABLE_RAM_START = .;
KEEP(*(.vectors_ram))
. = ALIGN(512);
__BDT_BASE = .;
*(.usb_bdt)
__BDT_END = .;
. = ALIGN(0x20);
__USER_NO_MEMORY_START = .;
*(.nouser)
__USER_NO_MEMORY_END = .;
. = ALIGN(0x20);
__USER_RO_MEMORY_START = .;
*(.rouser)
__USER_RO_MEMORY_END = .;
. = ALIGN(0x20);
__USER_RW_MEMORY_START = .;
*(.rwuser)
__USER_RW_MEMORY_END = .;
. = ALIGN(0x20);
__USER_DEFAULT_MEMORY_START = .;
__START_DATA = .;
*(.data)
__END_DATA = .;
. = ALIGN(0x10);
__START_SDATA = .;
*(.sdata)
__END_SDATA = .;
. = ALIGN(0x10);
__SDA_BASE = .;
__SDA_BASE_ = __SDA_BASE;
. = ALIGN(0x20);
*(.kernel_data)
. = ALIGN(0x10);
} > ram
.main_application_bss :
{
. = ALIGN(0x10);
__START_SBSS = .;
*(.sbss)
*(SCOMMON)
__END_SBSS = .;
__START_BSS = .;
*(.bss)
*(COMMON)
__END_BSS = .;
. = ALIGN(0x20);
__USER_DEFAULT_MEMORY_END = .;
. = ALIGN(0x10);
} > ram
.kernel_data :
{
__KERNEL_DATA_START = ALIGN(0x10);
}
.end_of_kernel_data :
{
__KERNEL_DATA_END = .;
} > end_of_kd
.boot_stack :
{
_stack_end = .;
} > bstack
.end_of_boot_stack :
{
_stack_addr = .;
__SP_INIT = .;
__BOOT_STACK_ADDRESS = .;
} > end_bstack
_romp_at = __COPY_OF_DATA + SIZEOF(.main_application_data);
.romp : AT (_romp_at)
{
__S_romp = _romp_at;
LONG(__COPY_OF_DATA);
LONG(ADDR(.main_application_data));
LONG(SIZEOF(.main_application_data));
LONG(0);
LONG(0);
LONG(0);
}
.ARM.attributes 0 : { *(.ARM.attributes) }
_flashx_start = __COPY_OF_DATA + SIZEOF(.main_application_data) + SIZEOF(.romp);
__FLASHX_START_ADDR = ((_flashx_start + __FLASHX_SECT_SIZE - 1) / __FLASHX_SECT_SIZE) * __FLASHX_SECT_SIZE;
__FLASHX_END_ADDR = __INTERNAL_FLASH_BASE + __INTERNAL_FLASH_SIZE;
}
Can anyone help?
Thanks an best regards,
Tobias