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Kinetis K20 UART TX with DMA

Question asked by Nixon Wayne on Jul 22, 2013
Latest reply on Jul 25, 2013 by Nixon Wayne

Hi,

 

I am currently working on small project and I would like to use DMA for UART transmission.  My current configuration is not working properly. I configured everything and in interrupt mode my UART TX is working ok but not with DMA. DMA always transfers only one byte.

 

I would be really grateful for any help.


Here is my code for transfering 4 bytes from memory to UART:


// Enable DMA clocks

  SIM->SCGC6 |= SIM_SCGC6_DMAMUX_MASK;

  SIM->SCGC7 |= SIM_SCGC7_DMA_MASK;

 

  // Enable UART1, PORT clocks, and TX line

 

  // configure TX pin

  SIM->SCGC5 |=  SIM_SCGC5_PORTE_MASK;

  PORTE->PCR[0] &= ~PORT_PCR_MUX_MASK;

  PORTE->PCR[0] |= PORT_PCR_MUX(GPIO_AF_ALT3);

 

  SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;

 

  br_mpx = __UART_BRR(48000000, 9600);   // calculate baud rate mpx from desired clock

 

  // clear baud rate registers

  UART1->BDH &= ~(UART_BDH_SBR_MASK);   

  UART1->BDL = 0;

 

  // set baud rate

  UART1->BDH |= HI_BYTE(br_mpx);         

  UART1->BDL |= LO_BYTE(br_mpx);

 

  // Set baud rate

  UART1->C1  = 0;

 

 

  // Set FIFO water marks

  UART1->TWFIFO = UART_TWFIFO_TXWATER(1);

  UART1->RWFIFO = UART_RWFIFO_RXWATER(1);

 

 

  // Enable transmitter

  UART1->C2 = 0;

  UART1->C2 |= UART_C2_TE_MASK;

  UART1->S2 = 0;

  UART1->C3 = 0;

 

 

  // Configure TX DMA

  DMAMUX->CHCFG[0] &= ~(DMAMUX_CHCFG_ENBL_MASK);

  DMA0->CR = 0;

 

  DMAMUX->CHCFG[0] = DMAMUX_CHCFG_SOURCE(DMAMUX_UART1_SLOT);

  UART1->C2 |= UART_C2_TIE_MASK;

  UART1->C5 |= UART_C5_TDMAS_MASK;

  DMA0->TCD[0].BITER_ELINKNO = 1;

  DMA0->TCD[0].CITER_ELINKNO = 1;

  DMA0->TCD[0].SADDR = (uint32_t) &data_in[0];

  DMA0->TCD[0].ATTR = DMA_ATTR_SMOD(8) | DMA_ATTR_SSIZE(0) | DMA_ATTR_DMOD(0) | DMA_ATTR_DSIZE(0);

  DMA0->TCD[0].SOFF = 1;

  DMA0->TCD[0].NBYTES_MLNO = 4;

  DMA0->TCD[0].SLAST = 0;

  DMA0->TCD[0].DADDR = (uint32_t) &(UART1->D);

  DMA0->TCD[0].DOFF = 0;

  DMA0->TCD[0].DLAST_SGA = 0;

 

  DMA0->ERQ &= ~DMA_ERQ_ERQ0_MASK;

  DMAMUX->CHCFG[0] |= DMAMUX_CHCFG_ENBL_MASK;

  NVIC_EnableIRQ(DMA0_IRQn);

 

  DMA0->TCD[0].CSR = DMA_CSR_DREQ_MASK | DMA_CSR_DONE_MASK | DMA_CSR_INTMAJOR_MASK;

 

  DMA0->ERQ |= DMA_ERQ_ERQ0_MASK;

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