Can we put Power PC in an Indefinite wait state using LUPWAIT signal?

[shantanunakhate]

Hello,

       I am working on a project where I am using the MPC834X PowerPC. We want to put the power PC in an indefinite wait state while doing asynchronous local bus transactions. One way to do this is by using the LUPWAIT signal.

Can you please confirm that the assertion of LUPWAIT signal shall put Power PC in a wait state (indefinitely) till the LUPWAIT signal is negated?

Thanks and Regards,

Shantanu.

[Bulat]

Yes, LUPWAIT can be used for asynchronous bus transactions on the local bus if a target memory (I/O)  device is slow. To get this functionality the memory should be UPM-controlled, LUPWAIT signal should be enabled in the MxMR, WAEN bit should be set in the corresponding UPM RAM read/write patterns.

[shantanunakhate]

Thanks for your reply,

For how many clock cycles can I keep this LUPWAIT signal asserted before Power PC goes into a timeout exception if any? Or is it that I can keep this LUPWAIT signal asserted till any number of clock cycles?

[LPP · Accepted solution]

A bus monitor is provided to ensure that each transaction is terminated

within a reasonable (user defined) period.

The wait time can't exceed timeout settings in LBCR[BMT,BMTPS].

[hwrobel]

The time depends purely on any enabled or disabled watchdog configuration you have in the SoC.

If you have all bus watchdogs disabled, the bus will wait indefinitely. If any watchdog covering such bus cycles is enabled, the cycle will be aborted per watchdog configuration. This concept is universally true for all PowerQUICC or QorIQ SoCs.