I've run in to an issue using the CodeWarrior 10.4 default project setup for the PXS2010 / MPC5643L. Our project contains internally written UART drivers that use DMA for the transmit process. They work well in RAM build but when we switch to FLASH build the code drops out to a Data TLB Error Interrupt when trying to configure the DMA_MUX registers.
Digging in to the MMU setup it seems that entry 8 (Off-Platform Peripherals C) starts at 0xFFF9_0000 and has a size of 256KB, and thus ends at 0xFFFD_0000. However, the DMA_MUX registers are at 0xFFFD_C000 and therefore outside of the MMU entry. The next entry is for the BAM and starts at 0xFFFF_C000. It therefore seems that the DMA_MUX registers are in an unassigned region.
I have tried changing entry 8 to 512KB so that the DMA_MUX registers are included and our problem goes away, we can configure the DMA_MUX with no issues. However, this means the Peripheral entry overlaps with the BAM entry which sounds like a very bad idea. What is the correct solution here? Should I create an extra table entry with a smaller size to fit the gap? If so, shouldn't this be the default setup in PXS2010_HWInit.h.
Tom
Solved! Go to Solution.
Hello Tom,
Thanks for this post. Indeed the startup MMU initialization is missing some Off-Platform Peripherals C like FlexCAN or DMA_MUX registers.
The TLB address spaces cannot overlap therefore TLBs dedicated to Off-platform peripherals needs to be split-ed (see the table below)
Core_0 MMU table:
-----------------------------------------------------------------
Name: TLB entry Start Length Mode
-----------------------------------------------------------------
FLASH 0 0x0000_0000 1MB LS/DP
SHADOW_FLASH 3 0x00F0_0000 1MB LS/DP
(1)SRAM_LS/DP_0 1 0x4000_0000 128KB/64KB LS/DP
(2)SRAM_DP_1 2 0x5000_0000 64KB DP
On-P. Per. 1 4 0x8FF0_0000 512KB DP
(3)Off-P. A 5 0xC3F8_8000 512KB LS/DP
Off-P. Per. B 6 0xFFE0_0000 512KB LS/DP
On-P. Per. 0 7 0xFFF0_0000 512KB LS/DP
Off-P. Per. C1 8 0xFFF9_0000 256KB LS/DP
Off-P. Per. C2 9 0xFFFD_0000 128KB LS/DP
BAM 10 0xFFFF_C000 16KB LS/DP
This issue will be fixed in CodeWarrior for MCU v10.5 which will be released soon.
Anyway, I've attached is the updated MPC5643L_HWInit.h. so you can reuse it in your project.
Hope it will help.
Stan
Hello Tom,
Thanks for this post. Indeed the startup MMU initialization is missing some Off-Platform Peripherals C like FlexCAN or DMA_MUX registers.
The TLB address spaces cannot overlap therefore TLBs dedicated to Off-platform peripherals needs to be split-ed (see the table below)
Core_0 MMU table:
-----------------------------------------------------------------
Name: TLB entry Start Length Mode
-----------------------------------------------------------------
FLASH 0 0x0000_0000 1MB LS/DP
SHADOW_FLASH 3 0x00F0_0000 1MB LS/DP
(1)SRAM_LS/DP_0 1 0x4000_0000 128KB/64KB LS/DP
(2)SRAM_DP_1 2 0x5000_0000 64KB DP
On-P. Per. 1 4 0x8FF0_0000 512KB DP
(3)Off-P. A 5 0xC3F8_8000 512KB LS/DP
Off-P. Per. B 6 0xFFE0_0000 512KB LS/DP
On-P. Per. 0 7 0xFFF0_0000 512KB LS/DP
Off-P. Per. C1 8 0xFFF9_0000 256KB LS/DP
Off-P. Per. C2 9 0xFFFD_0000 128KB LS/DP
BAM 10 0xFFFF_C000 16KB LS/DP
This issue will be fixed in CodeWarrior for MCU v10.5 which will be released soon.
Anyway, I've attached is the updated MPC5643L_HWInit.h. so you can reuse it in your project.
Hope it will help.
Stan