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Question asked by Alex Smirnov on Jul 2, 2013
Latest reply on Dec 16, 2016 by Andrew Wozniak

Hi folks,


currently I'm working with SPI-NOR flash on i.MX6 board and faced with a strange issue. The default SPI clock is 30MHz, flash works good. The problem occures when I set SPI clock to 60MHz. At this frequency, the data collected in i.MX6 RX FIFO is shifted right for 1 bit. So, for example, if I send READ_ID command 0x9F, I should receive 0xC2 (and I do receive it at 30MHz), but at 60MHz I receive 0x61 at any time (0x61 = 0xC2 >> 1).


Moreover, I connected oscilloscope - the pictires for 30MHz and 60MHz are completely the same. So no physical deviations were observed.


Also, according to the flash spec - it supports up to 133MHz.


Is there any clock speed limitations or known HW errors in eCSPI on i.mx6 SoC?


With best regards,