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Connection of flash memory on MPC8548E local bus.

Question asked by rainer03 on Jul 1, 2013
Latest reply on Jul 2, 2013 by LPP

When connecting flash to the local bus, I see that it's necessary to wire the interface of the flash and local bus in reversed order due to the big-endian mode of MPC8548E. I see in MPC8548E Configurable Development System carrier board, the data bus is connected as Flash_D[0..15] <--> MPC_D[15..0]. But I don't understand why the order of address bus is not reversed. In CDC, it's Flash_A[0..21] <--> MPC_A[0..21] instead of Flash_A[0..21] <--> MPC_A[31..10]. With such wiring, how can the MPC address the flash correctly?

 

Another question is, how the type of the flash, i.e., top/bottom/uniform sectored, decides the connection of the bus?

 

Thank you for any response.

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