AnsweredAssumed Answered

SRIO initialzation problem between MSC8156 and Virtex 6 FPGA

Question asked by Jimmy Schroeder on Jun 27, 2013



We using the SRIO with a point to point link between the MSC8156 and a Xilinx Virtex 6 FPGA.


There is two different problem:


- Since we have remove the SRIO switch between DSP and FPGA, sometimes after a system power up, the DSP SRIO initialization is stuck in the do while loop after the srio_recover function (file msc815x_srio_init.c ).

Is it a known problem or hawe we forget to do something ?


- When the DSP reboot and the FPGA doesn't reboot (hardware reason) we use the fonction srioResetNeighbour (file tundra_stx.c) to reset the SRIO part of the FPGA.

But it doesn't work the FPGA is already discovered and the DSP is stuck srioNeighbourIsSwitch function wait loop (still in file tundra_stx.c).

Is there a solution to avoid this problem, because SRIO link is our only one communication link between DSP and FPGA ?


Thanks is advance