imx53 connect to FPGA via EIM interface. non-multiplexed mode.Config EIM registers as shown below(almost the same to recommend PSRAM's configration of datasheet for imx53RM) that i will burst access FPGA.
// Synchronous Mode 32 bit memory
Write(or read) data to(/from) EIM(FPGA), there are always one more times triger access(See attached timing diagram---write1.bmp,write2.bmp,read.bmp), That's the ourtiming diagram.
When burst access, the monitoring timing diagram is PSRAM-like.
ps:when i access to FPGA, the data and address transfer is no problem.