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imx53  Config EIM register as PSRAM, burst access

Question asked by wang yx on Jun 17, 2013
Latest reply on Jun 20, 2013 by wang yx

   imx53 connect to FPGA via EIM interface. non-multiplexed mode.Config EIM registers as shown below(almost the same to recommend PSRAM's configration of datasheet for imx53RM) that i will burst access FPGA.

 

// Synchronous Mode 32 bit memory

WR32('EIM_CS0GCR1,'h4003_1487);

WR32('EIM_CS0RCR1,'h04000000);

WR32('EIM_CS0RCR2,'h00000008);

WR32('EIM_CS0WCR1,'h04000000);

 

    Write(or read) data to(/from) EIM(FPGA), there are always one more times triger access(See attached timing diagram---write1.bmp,write2.bmp,read.bmp), That's the ourtiming diagram.

 

Expect result:

When burst access, the monitoring timing diagram is PSRAM-like.

 

 

ps:when i access to FPGA, the data and address transfer is no problem.

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