Erroneous interrupt generated when enabling LPTMR0 on FRDM-KL25Z board

[gustavod]

Hi,

I´m trying to substitute my RTOS tick timer from the ARM systick to the LPTMR0 timer, in order to get better low power mode support.

However, when the code enables the LPTMR0 interrupt by the NVIC_ISER register, an erroneous interrupt is generated. The code that do that is:

NVIC_ISER |= NVIC_EN0_INT28; (on CoIDE)

or

  /* Common initialization of the CPU registers */    (on CodeWarrior 10.4)

  /* NVIC_ISER: SETENA|=0x10000000 */

  NVIC_ISER |= NVIC_ISER_SETENA(0x10000000);

The interrupt is generated as soon the LPTMR0 bit is set in NVIC_ISER register. The code that follows that lines is:

/* NVIC_IPR7: PRI_28=0xC0 */

NVIC_IPR7 = (uint32_t)((NVIC_IPR7 & (uint32_t)~(uint32_t)(

           NVIC_IP_PRI_28(0x3F)

          )) | (uint32_t)(

           NVIC_IP_PRI_28(0xC0)

          ));

/* SIM_SCGC5: LPTMR=1 */

SIM_SCGC5 |= SIM_SCGC5_LPTMR_MASK;

/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=0,TIE=0,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */

LPTMR0_CSR = LPTMR_CSR_TPS(0x00);

/* LPTMR0_CMR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,COMPARE=0 */

LPTMR0_CMR = LPTMR_CMR_COMPARE(module);

/* LPTMR0_CSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,TCF=1,TIE=1,TPS=0,TPP=0,TFC=0,TMS=0,TEN=0 */

LPTMR0_CSR = (LPTMR_CSR_TCF_MASK | LPTMR_CSR_TIE_MASK | LPTMR_CSR_TPS(0x00));

/* LPTMR0_PSR: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,??=0,PRESCALE=0,PBYP=1,PCS=1 */

LPTMR0_PSR = LPTMR_PSR_PRESCALE(0x00) |

             LPTMR_PSR_PBYP_MASK |

             LPTMR_PSR_PCS(0x01);

/* LPTMR0_CSR: TCF=0,TEN=1 */

LPTMR0_CSR = (uint32_t)((LPTMR0_CSR & (uint32_t)~(uint32_t)(

              LPTMR_CSR_TCF_MASK

             )) | (uint32_t)(

              LPTMR_CSR_TEN_MASK

             ));

The problem is that I do not want the interruption to be generated before the system starts. Why this interrupt is being generated even before the LPTMR0 clock is enabled?

Any help will be appreciated.

Best regards,

Gustavo

[Kan_Li · Accepted solution]

Have you also tried to set the ICPR register before writing to ISER? This is used to avoid some unexcepted interrupt .

Please kindly refer to the following example for referenece.

void enable_irq (int irq)

{  

    /* Make sure that the IRQ is an allowable number. Up to 32 is

     * used.

     *

     * NOTE: If you are using the interrupt definitions from the header

     * file, you MUST SUBTRACT 16!!!

     */

    if (irq > 32)

        printf("\nERR! Invalid IRQ value passed to enable irq function!\n");

    else

    {

      /* Set the ICPR and ISER registers accordingly */

      NVIC_ICPR |= 1 << (irq%32);

      NVIC_ISER |= 1 << (irq%32);

    }

}

[gustavod]

Hi Kan,

Thank you for remember me that. I completely forgot that there is a register to clear pending interrupts.

The code you posted solved the problem.

Best regards,

Gustavo