I am working on a KL15 device and one part of the end application requires the MCU to pass half/full duplex data between uart0 and uart1. The speed can go upto 500kbps. So I am trying to setup two DMA channels to do this. I have reused code from FRDM sample code package... specifically from the low power uart demo.
Here is how my dma channels and UARTS are setup:
1. DMA channel 0 is set up to transfer data from UART0_D to UART1_D.Cycle steal is on and triggering is done by UART0 byte receive event (UART0_C4->RDMAE bit is set)
2. DMA channel 1 is set up to transfer data from UART1_D to UART0_D. Cycle steal is on and trigger is done by UART1 byte receive event (UART1_C5-> RDMAS bit and UART1_C2 -> RIE bit are set)
3. Both DMA channels are initially loaded with a BCR value of 0F_FFFFh to get lowest interrupts.
4. Both DMA transfer complete interrupts writes a 1 to the DONE bit and then reloads the BCR with 0F_FFFFh.
I can get data from UART1 to UART0 without any problem or corruption. But I cannot get it the other way around. Data that streamed into UART0 does not get streamed out at UART1. If I configure the DMA0 to have UART0_D address for both source and destination, I get echos in my terminal as expected.
I cannot pinpoint the reason why the DMA isn't working when destination register is UART1. Both of the UART are at same baud rate(currently 9600) and same data format (8N1).
I am not sure if this is a normal use case for transferring data between uarts. I was thinking if its a good idea to use a internal buffer between the two uarts. Please advice if there are better or proper ways to do this.
thanks to whoever reads and helps