AnsweredAssumed Answered

Slow execution causing lag in GPIO signals (trying to enable cache to speedup)

Question asked by Paul Holmquist on Jun 10, 2013
Latest reply on Jun 18, 2013 by Ioseph Martinez Pelayo

I'm experiencing very slow execution times with running code that controls GPIO pin signals on the Vybrid chip.  The code assert one GPIO then asserts another with only a few lines of code in-between to setup the LWPTIMER.  Its taking about 12 usec between these GPIO assertions which is about 10 times longer then it should base on how a similar set of operations was performed on another ARM processor (at about the same CPU clock speed).

 

I suspect slowness might be caused by reusing the current cache-disabled configuration that came with the example MQX programs but I'm having difficultyin finding documentation on how the add seperate memory regions where some have cache enable and others disabled.  I'm running everything using the intram.icf linker file so this maps all code/data to internal memory

 

The example MQX user_config.hhas cache disabled (#define MQX_USE_UNCACHED_MEM 1).  However, when I tried to review this "compile-time" option under the MQX user guide document, it doesn't even mention this symbol (3.14.1 MQX Compile-time COnfiguration Options). So then I started looking at the PSP component code to reverse engineer the MMU calls but that lead to a dead end per the MQX reference manual statement on any of the MMU API's ("see the PSP Release Note").  But I can't find the "PSP Release Note" document.

 

I believe that turning on cache would fix the slowness here but what are the consequences of this (why didn't MQX example programs come with data-cache enabled instead of disabled)?

 

I will try to just update/change the MQX_USE_UNCACHED_MEM to a value of 0 instead but that appears to enable it for all memory which I can at least tell me if the execution speeds up (assuming it doesn't break another else given the lack of documentation for it)...  However, I will eventually still need to have separate regions of cache/no-cache.

 

Message was edited by: Paul Holmquist Updating MQX_USE_UNCACHED_MEM had no effect.  Which is what I suspected after reviewing the logic in init_bsp.c:_bsp_enable_card().  The following "_mmu_add_vregion" calls don't even appear to be consistent with the intram.icf since its using the "PSP_PAGE_TYPE_CACHE_NON" attribute on the internal ram.  Besides that, the ram size doesn't even seem match the size in the intram.icf file contents... why is this OK...? /* add region in sram area */         _mmu_add_vregion((pointer)__INTERNAL_SRAM_BASE, (pointer)__INTERNAL_SRAM_BASE, (_mem_size) 0x00100000, PSP_PAGE_TABLE_SECTION_SIZE(PSP_PAGE_TABLE_SECTION_SIZE_1MB) | PSP_PAGE_TYPE(PSP_PAGE_TYPE_CACHE_NON)   | PSP_PAGE_DESCR(PSP_PAGE_DESCR_ACCESS_RW_ALL));

Outcomes