I'm developing a FW used to "play" a particular waveform (a kind of 40KHz sine wave) on DAC0 output.
I use a KL05 32KFlash 48MHz processor. I would like to implement a linked DMA approach in order to keep as stable as possible
the output waveform and keep the use of CPU core as low as possible. I've created 4 const array with 1024 samples (16bit each sample).
I would like to start the waveform generation with DMA0 which generates an interrupt at the end of the whole array transfer
and at same time generates the trigger signal for the DMA1 channel. DMA1 channel "plays" the second array and at the end of
the whole array transfer triggers the DMA0 activity. This sequence must be repeated for a specific number of times.
All the DMA activities must be timed by PIT (or TPM1) in order to play the samples at the right rate.
How can I program the DMA channels in order to be activated by the hw trigger sources (DMA channels and timer) in the right sequence?
The interrupt service routines has to be as shorter as possible because each delay/latency becomes an output waveform distortion.
Thanks for any suggestion.