We have interfaced an Audio DAC to i.MX53 controller trough the SSI interface in I2S mode for the audio playback output.
The Audio DAC is from Wolfson WM8523. This particular DAC doesn't have any internal PLL and needs an accurate external Master clock input to produce the accurate Sampling rates for the outputs. The Master Clock for the DAC is produced from "CCM_SS1_EXT1_CLK " pin of Controller.
The Master clock requirements are given below,
We needed the sampling rates of 96KHz, hence we were trying to set the Master clock value to 24.576 MHz. When we have set to this value, we are getting 25 MHz. And then when we try to set to 24 MHz, we are getting 23.59 MHz. Also, I have noticed that the Master clock output value is getting rounder off to 24MHz.
I think that there is an issue with the clock output resolution steps. We are able to get only 25 MHz after 23.59 MHz and not any other value in between.
What clock configurations would be required to achieve the above mentioned required Master Clock on CCM_SS1_EXT1_CLK pin??