k70's I2C working in interrupt mode in bareboard

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k70's I2C working in interrupt mode in bareboard

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yifangguo-b4310
NXP Employee
NXP Employee

Hi all,

  Investigated the i2c interrupt mode of k70 in bareboard recently.   And share all with some code:

void i2c0_txint_initial(void)

  /* Disable I2C0 Interrupt in NVIC*/

  disable_irq(24); //I2C0 Vector is 40. IRQ# is 40-16=24

  i2c0_STATE = I2C_STATE_TRANSMIT;

  I2C0_C1 |= I2C_C1_IICIE_MASK;     /* enable I2C interrupt request */

  I2C0_S |= I2C_S_IICIF_MASK;            /* Clear i2c0 interrupt flag */

/* Produce START signal to transmit */

  I2C0_C1 |= I2C_C1_TX_MASK;     

  I2C0_C1 |= I2C_C1_MST_MASK;

   

/* Send slave address */

  I2C0_D = (ACCEL_I2C_ADDRESS << 1) | 0x00;

  while (0 == (I2C0_S & I2C_S_IICIF_MASK))

            { };    /* wait for address transferred */

    /* Enable I2C0 Interrupt in NVIC*/

  enable_irq(24); //I2C0 Vector is 40. IRQ# is 40-16=24

  

}

void i2c0_rxint_initial(void)

  /* Disable I2C0 Interrupt in NVIC*/

  disable_irq(24); //I2C0 Vector is 40. IRQ# is 40-16=24

  i2c0_STATE = I2C_STATE_RECEIVE;

  I2C0_C1 |= I2C_C1_IICIE_MASK ;    /* enable I2C interrupt request */

  I2C0_S |= I2C_S_IICIF_MASK;  /* Clear i2c0 interrupt flag */

/* RE-START  transmit */

  I2C0_C1 |= I2C_C1_TX_MASK ;     

  I2C0_C1 |= I2C_C1_RSTA_MASK;  

/* Send slave address  to read data*/

  I2C0_D = (ACCEL_I2C_ADDRESS << 1) | 0x01;

  while (0 == (I2C0_S & I2C_S_IICIF_MASK))

            { };    /* wait for address transferred */

  /* Enable I2C0 Interrupt in NVIC*/

  enable_irq(24); //I2C0 Vector is 40. IRQ# is 40-16=24

}

void i2c0_isr(void)

{

  unsigned char i2csr, tmp;

  int n;

  i2csr = I2C0_S;

  I2C0_S |= I2C_S_IICIF_MASK;    /* Clear interrupt flag */

  /* Master */

  if (I2C0_C1 & I2C_C1_MST_MASK)

  {

     /* Transmit */

      if (I2C0_C1 & I2C_C1_TX_MASK)

      {

       /* Not ack */

         if (i2csr & I2C_S_RXAK_MASK)

         {

         }

        /* Ack */

         else

         {

           /* Transmit requested */

            if (I2C_STATE_TRANSMIT == i2c0_STATE)

            {

              if (TX_OUT < TX_NUM)

                 I2C0_D = TX_BUFFER[TX_OUT++];

              else

                 {

                   TX_OUT = 0;

                   if (i2c0_rep == 0)

                   {

                     /* i2c0_stop */

                     I2C0_C1 &= ~I2C_C1_MST_MASK;

                     I2C0_C1 &= ~I2C_C1_TX_MASK; 

                     I2C0_C1 &= (~ I2C_C1_IICIE_MASK);

                   }

                 }

            }

            /* Receive requested */

            else if (I2C_STATE_RECEIVE == i2c0_STATE)

            {   

              /* i2c_EnterRxMode()  */

              I2C0_C1 &= ~I2C_C1_TX_MASK;

              I2C0_C1 &= ~I2C_C1_TXAK_MASK;  /* Set Hardware  produce Ack ,  as  FASK=0  */

              tmp = I2C0_D;   /* dummy read to clock in 1st byte */                   

            }

             /* Others are unwanted/not handled states */

            else

            {

                disable_irq(24);

            }

          

         }

      }

       /* Receive */

      else

      {

         /* Receive requested */

         if (I2C_STATE_RECEIVE == i2c0_STATE)

         {

            RX_BUFFER[RX_IN] = I2C0_D;           

            RX_IN ++;

                    

            if (RX_IN >= RX_BUFFER_SIZE)

               {

                 RX_IN = 0;

                }

         }

         else

         {

           disable_irq(24);

         }

      

      }

  

  }

  else

  {

  

  }

}

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