I have the SINGLE PORT MODE working on my hardware (using BeeStack v1.0.2 (April '07) codebase)... after working out a few hardware issues.
For future reference see the following:
- Freescale AN3248 (for hardware and peripheral background info).
- Like SPELL / Flippo says, edit the FILE: "Mc1319xReg.h" (lines 141-143)
Code:
/** Register 0x07 aka ABEL_CONTROL2_REG*/#define ABEL_CONTROL2_REG ABEL_reg7#define cTMR_LOAD (1<<15)#define cCT_BiasEn (1<<14)#define cRF_SwitchMode (1<<12)#define cCLKO_DOZE_EN (1<<9)#define cABEL2SPI_MASK (1<<8)#define cTX_DONE_MASK (1<<7)#define cRX_DONE_MASK (1<<6)#define cUSE_STRM_MODE (1<<5)#define cHG_BIAS_EN (1<<4)#define cHG_EN (1<<2)#define cHIB_EN (1<<1)#define cDOZE_EN (1<<0)
- Then modify "MacPhy\Phy\PhyMain.c" (lines 170-177)
Code:
// Setup default antenna switch mode if (useDualAntenna == TRUE){ MC1319xDrv_ReadSpiAsync(ABEL_CONTROL2_REG, &retReg); retReg &= 0x8FFF; retReg |= 0x4000; // Dual antenna setup at boot, CT_Bias_en = 1, RF_switch_mode = 0, CT_Bias_inv = 0 MC1319xDrv_WriteSpiAsync(ABEL_CONTROL2_REG, retReg); } else { // Single antenna setup at boot, CT_Bias_en = 1, RF_switch_mode = 1, CT_Bias_inv = 0 MC1319xDrv_ReadSpiAsync(ABEL_CONTROL2_REG, &retReg); retReg &= 0x8FFF; retReg |= ((uint16_t)cCT_BiasEn | (uint16_t)cRF_SwitchMode); MC1319xDrv_WriteSpiAsync(ABEL_CONTROL2_REG, retReg); }
- Lastly, check lines 153-159 of "NV_Data.c" and line 167 of "PortConfig.h" to ensure "useDualAntenna" is defined as FALSE
NOTE: My "PhyMain.c" mod could be re-writen/optimized (I purposely left it like this to help people find the original code).
NOTE 2: When Freescale updates their BeeStack codebase in BeeKit, this may not apply.
Regards,
- Ware